Abstract: Methods and apparatus for enabling a line card to support multiple ports, multiple rates, and multiple protocols within an optical network system are disclosed. According to one embodiment, a line card that is suitable for incorporation into one of a multi-slot broadband digital cross-connect system or a multiservice provisioning platform includes a first port and a plurality of devices. The first port is arranged to be provisioned to accept an input signal which may be one of a signal of a first protocol and a signal of a second protocol. The plurality of devices being arranged to process the input signal to create an output signal which has a SONET payload. In one embodiment, the signal of the first protocol is an OC-n signal and the signal of the second protocol is a Gigabit Ethernet signal.

Abstract: Optical transceiver modules with multiple channel connection with connectors on a motherboard of a line card for network devices, such as a switch, router, crossconnect and the like, are presented. The modules have staggered electronic boards which can engage the connectors which are laterally displaced on the motherboard. The connectors are also arranged so that one of them can engage an optical transceiver module in an SFP connection so that the motherboard connectors are compatible with multiple channel and single channel (SFP) connections.

Abstract: Methods and apparatus for enabling a line card to support multiple ports, multiple rates, and multiple protocols within an optical network system are disclosed. According to one aspect of the present invention, a line card that is suitable for incorporation into one of a multi-slot broadband digital cross-connect system or a multiservice provisioning platform includes a first port and a plurality of devices. The first port is arranged to be provisioned to accept an input signal which may be one of a signal of a first protocol and a signal of a second protocol. The plurality of devices being arranged to process the input signal to create an output signal which has a SONET payload. In one embodiment, the signal of the first protocol is an OC-n signal and the signal of the second protocol is a Gigabit Ethernet signal.

Abstract: Optical transceiver modules with multiple channel connection with connectors on a motherboard of a line card for network devices, such as a switch, router, crossconnect and the like, are presented. The modules have staggered electronic boards which can engage the connectors which are laterally displaced on the motherboard. The connectors are also arranged so that one of them can engage an optical transceiver module in an SFP connection so that the motherboard connectors are compatible with multiple channel and single channel (SFP) connections.

Abstract: A system provides a zero interconnection height in a board-to-board interconnect while maintaining efficient space allocation for multiple axis connections by providing a floating connection in one plane thereby enabling a connection in another plane. A first circuit board having a first plurality of through-holes is aligned with a second circuit board having a second plurality of through-holes so that the first plurality of through-holes is matched with the second plurality of through-holes. An interconnection height of zero is provided between the first circuit board and the second circuit board. At least one pass-through socket, which includes pass-through socket through-holes, is aligned with the combination of the first circuit board and second circuit board. One or more pins disposed on a pin header are inserted through the pass-through socket, the first circuit board, and the second circuit board.

Abstract: Methods and apparatus for enabling a line card to support multiple ports, multiple rates, and multiple protocols within an optical network system are disclosed. According to one aspect of the present invention, a line card that is suitable for incorporation into one of a multi-slot broadband digital cross-connect system or a multiservice provisioning platform includes a first port and a plurality of devices. The first port is arranged to be provisioned to accept an input signal which may be one of a signal of a first protocol and a signal of a second protocol. The plurality of devices being arranged to process the input signal to create an output signal which has a SONET payload. In one embodiment, the signal of the first protocol is an OC-n signal and the signal of the second protocol is a Gigabit Ethernet signal.

Abstract: Methods and apparatus for enabling a line card to support multiple ports, multiple rates, and multiple protocols within an optical network system are disclosed. According to one aspect of the present invention, a line card that is suitable for incorporation into one of a multi-slot broadband digital cross-connect system or a multiservice provisioning platform includes a first port and a plurality of devices. The first port is arranged to be provisioned to accept an input signal which may be one of a signal of a first protocol and a signal of a second protocol. The plurality of devices being arranged to process the input signal to create an output signal which has a SONET payload. In one embodiment, the signal of the first protocol is an OC-n signal and the signal of the second protocol is a Gigabit Ethernet signal.

Abstract: An optical transceiver and method therefore provides a cooled laser diode configured to run in either a low power mode or a standard mode. A method for a thermo-electric cooler includes coupling the thermo-electric cooler to a laser diode, operating the thermo-electric cooler in one of a low power mode and a standard mode, and switching between the low power mode and the standard mode. The laser diode is configured to transmit signals in the low power mode and the standard mode. The low power mode maintains the laser diode at a temperature within a predetermined range of temperatures. The standard mode maintains the laser diode at a temperature that corresponds to a predetermined wavelength of light output from the laser diode. In one embodiment, the low power mode is a Time Division Multiplexing (TDM) mode and the standard mode is a Dense Wavelength Divison Multipexing (DWDM) mode.

Abstract: A method and apparatus for synchronizing clocks is provided that is flexible and compensates for process, voltage, and temperature (PVT) variations and other timing differences between two devices. The present invention includes producing an up-converted clock from a system clock, the up-converted clock having a frequency that is a multiple of the frequency of the system clock, producing an aligned clock from a data-aligned clock from a first device and a counter clock from a second device, producing a de-jittered clock, selecting a first reference clock to send to the first device from the up-converted clock, the aligned clock and the de-jittered clock, and selecting a second reference clock to send to the second device from the up-converted clock, the aligned clock and the de-jittered clock.

Abstract: A method and circuit board assembly provide a zero interconnection height in a board-to-board interconnect while maintaining efficient space allocation for multiple axis connections by providing a floating connection in one plane thereby enabling a connection in another plane.

Abstract: An optical interface circuit ?40! is provided. The optical interface circuit ?40! includes a receiver circuit ?82, 102! that receives incoming data from an optical signal and generates an electrical signal having the encoded data. The optical interface circuit ?40! also includes a transmitter circuit ?82, 104! that receives outgoing data and encodes the outgoing data into an optical signal. An interface circuit ?112! connected to the receiver circuit ?82, 102! and the transmitter circuit ?82, 104! transmits control commands and control data to the receiver circuit ?82, 102! and the transmitter circuit ?82, 104!, and receives response data from the receiver circuit ?82, 102! and the transmitter circuit ?82, 104!. A controller circuit ?84, 114! connected to the interface circuit ?112! transmits the control commands and the control data to the interface circuit ?112! and receives the response data from the interface circuit ?112!.