Patents by Inventor Matthew Lee BANOWETZ
Matthew Lee BANOWETZ has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20170374183Abstract: According to one aspect, embodiments of the invention provide a wireless device comprising an overstress indicator circuit including a sense circuit configured to monitor a parameter of the wireless device and generate a sense signal corresponding to the parameter, a detection circuit configured to receive the sense signal from the sense circuit and generate a detection signal in response to a determination that the sense signal is indicative of an overstress condition in the device, an interface circuit, and a memory circuit coupled to the detection circuit and the interface circuit and configured to store an overstress condition indication for access via the interface circuit in response to receiving the detection signal, at least one power amplifier coupled to the interface circuit, and a transceiver coupled to the at least one power amplifier and configured to produce an RF transmit signal and to receive an RF receive signal.Type: ApplicationFiled: September 5, 2017Publication date: December 28, 2017Inventors: James Phillip Young, Matthew Lee Banowetz, Leo John Wilz, Ali J. Mahmud
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Publication number: 20170294880Abstract: Bias circuit for radio-frequency amplifier. In some embodiments, an amplifier circuit for radio-frequency applications can includes an amplifying transistor having an input. The amplifier circuit can further include a bias circuit having a first bias path implemented between a supply node and the input to provide a bias signal to the input of the amplifying transistor, and a second bias path implemented between the supply node and the input to provide an additional bias signal to the input of the amplifying transistor under a selected condition. The first bias path can include a first transistor configured to facilitate the bias signal provided to the input of the amplifying transistor, and the second bias path can include a second transistor configured to facilitate the additional bias signal provided to the input of the amplifying transistor.Type: ApplicationFiled: April 25, 2017Publication date: October 12, 2017Inventors: Michael Lynn GERARD, Ramanan BAIRAVASUBRAMANIAN, Dwayne Allen ROWLAND, Matthew Lee BANOWETZ
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Patent number: 9774716Abstract: According to one aspect, embodiments of the invention provide an overstress indicator circuit comprising a sense circuit configured to monitor a parameter of a device and generate a sense signal corresponding to the parameter, a detection circuit coupled to the sense circuit and configured to receive the sense signal from the sense circuit and generate a detection signal at a first level in response to a determination that the sense signal is indicative of an overstress condition in the device, an interface circuit, and a memory circuit coupled to the detection circuit and the interface circuit and configured to store an overstress condition indication for access via the interface circuit in response to receiving the detection signal at the first level.Type: GrantFiled: December 22, 2016Date of Patent: September 26, 2017Assignee: SKYWORKS SOLUTIONS, INC.Inventors: James Phillip Young, Matthew Lee Banowetz, Leo John Wilz, Ali J. Mahmud
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Patent number: 9774307Abstract: Power amplifier having biasing with selectable bandwidth. In some embodiments, a power amplifier can include an amplifying transistor having a base for receiving a signal to be amplified, and a bias circuit configured to bias the amplifying transistor. The bias circuit can include a reference transistor having a base coupled to the base of the amplifying transistor and a collector coupled to a reference current source. The bias circuit can further include a coupling circuit that couples the collector and the base of the reference transistor. The coupling circuit can include a switchable element configured to allow the coupling circuit to be in a first state to provide a first bandwidth for the bias circuit or a second state to provide a second bandwidth for the bias circuit.Type: GrantFiled: August 8, 2016Date of Patent: September 26, 2017Assignee: Skyworks Solutions, Inc.Inventors: Matthew Lee Banowetz, Ramanan Bairavasubramanian, Michael Lynn Gerard, Philip H. Thompson
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Patent number: 9722771Abstract: A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.Type: GrantFiled: September 29, 2016Date of Patent: August 1, 2017Assignee: Skyworks Solutions, Inc.Inventors: Matthew Lee Banowetz, Philip H. Thompson, Edward James Anthony, James Henry Ross
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Publication number: 20170192933Abstract: Circuits, devices, and method for transmitting data in a serial bus. In some embodiments, the radio-frequency module includes a serial data line configured to communicate data serially. The radio-frequency module also includes a first signal line configured to indicate that new data is available for transmission via the serial data line. The radio frequency module further includes a first device coupled to the serial data line and the first signal line, the first device configured to transmit first data to a second device via the serial data line, transmit a first signal via the first signal line indicating to the second device that the new data is available, and transmit the new data to the second device via the serial data line.Type: ApplicationFiled: December 29, 2016Publication date: July 6, 2017Inventors: Matthew Lee BANOWETZ, James Henry Ross
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Patent number: 9698853Abstract: Various implementations include circuits, devices and/or methods that provide open loop current limiting power amplifiers and the like. In some implementations, an open loop current clamp includes a trim module to provide a control value and a limiting source having respective input and output terminals. The input terminal is coupled to the trim module to receive the control value. The output terminal coupled to a control terminal of the first transistor to provide a limiting electrical level produced in response to the control value by the limiting source. The limiting electrical level substantially setting a first mode of operation for the first transistor such that the current draw of the first transistor is substantially determined by the first mode of operation and the limiting electrical level such that a voltage at an output terminal of the first transistor exerts reduced influence on the current draw.Type: GrantFiled: July 7, 2014Date of Patent: July 4, 2017Assignee: Skyworks Solutions, Inc.Inventors: Paul Raymond Andrys, David Steven Ripley, Matthew Lee Banowetz, Kyle James Miller
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Publication number: 20170187334Abstract: Power amplification system with adaptive bias control. In some embodiments a power amplification system includes a power amplifier including a radio-frequency (RF) input terminal for receiving an RF signal, an RF output terminal for providing an amplified RF signal, a supply voltage terminal for receiving a power amplifier supply voltage to power the power amplifier, and one or more bias terminals for receiving one or more bias signals. The power amplification system also includes a bias controller configured to provide the one or more bias signals to the one or more bias terminals, at least one of the one or more bias signals being based on the power amplifier supply voltage.Type: ApplicationFiled: October 5, 2016Publication date: June 29, 2017Inventors: Matthew Lee BANOWETZ, Philip H. THOMPSON
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Publication number: 20170187857Abstract: According to one aspect, embodiments of the invention provide an overstress indicator circuit comprising a sense circuit configured to monitor a parameter of a device and generate a sense signal corresponding to the parameter, a detection circuit coupled to the sense circuit and configured to receive the sense signal from the sense circuit and generate a detection signal at a first level in response to a determination that the sense signal is indicative of an overstress condition in the device, an interface circuit, and a memory circuit coupled to the detection circuit and the interface circuit and configured to store an overstress condition indication for access via the interface circuit in response to receiving the detection signal at the first level.Type: ApplicationFiled: December 22, 2016Publication date: June 29, 2017Inventors: James Phillip Young, Matthew Lee Banowetz, Leo John Wilz, Ali J. Mahmud
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Publication number: 20170133987Abstract: Circuits, devices and methods related to multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.Type: ApplicationFiled: October 17, 2016Publication date: May 11, 2017Inventors: Jianxing NI, Michael Lynn GERARD, Ramanan BAIRAVASUBRAMANIAN, Dwayne Allen ROWLAND, Matthew Lee BANOWETZ
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Patent number: 9634619Abstract: Improved power amplifier (PA) bias circuit having parallel emitter follower. In some embodiments, a bias circuit for a PA can include a first bias path implemented to couple a base node of an amplifying transistor and a supply node, with the first bias path being configured to provide a base bias current to the base node. The PA can further include a second bias path implemented to be electrically parallel with the first bias path between the base node and the supply node. The second bias path can be configured to provide an additional base bias current to the base node under a selected condition.Type: GrantFiled: November 3, 2014Date of Patent: April 25, 2017Assignee: Skyworks Solutions, Inc.Inventors: Michael Lynn Gerard, Ramanan Bairavasubramanian, Dwayne Allen Rowland, Matthew Lee Banowetz
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Publication number: 20170093559Abstract: A power amplifier module can include one or more switches, a coupler module, input signal pins, and a controller having first and second output terminals. The input signal pins can receive a voltage input/output signal, a clock input signal, and a data input signal. The controller can (i) set a mode of the one or more switches using a synchronous communication protocol in which the controller outputs a synchronous clock signal on the first output terminal and a data signal on the second output terminal, when the power amplifier module is in a first operating mode, or (ii) set a mode of the coupler module using an asynchronous communication protocol in which the controller outputs a first asynchronous control signal on the first output terminal and a second asynchronous control signal on the second output terminal, when the power amplifier module is in a second operating mode.Type: ApplicationFiled: September 29, 2016Publication date: March 30, 2017Inventors: Matthew Lee Banowetz, Philip H. Thompson, Edward James Anthony, James Henry Ross
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Publication number: 20170091143Abstract: A simplified serial interface for a communications device. The serial interface includes an RF front end and a transmit block and at least one receive block located on different dies. The receive block is activated by a clock generator that is separate than the system clock. The at least one receive block can inhibit transmission of an enable signal to the receive block and inhibit operation of an oscillator of the interface.Type: ApplicationFiled: September 29, 2016Publication date: March 30, 2017Inventors: James Henry Ross, Matthew Lee Banowetz
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Publication number: 20170040962Abstract: Power amplifier having biasing with selectable bandwidth. In some embodiments, a power amplifier can include an amplifying transistor having a base for receiving a signal to be amplified, and a bias circuit configured to bias the amplifying transistor. The bias circuit can include a reference transistor having a base coupled to the base of the amplifying transistor and a collector coupled to a reference current source. The bias circuit can further include a coupling circuit that couples the collector and the base of the reference transistor. The coupling circuit can include a switchable element configured to allow the coupling circuit to be in a first state to provide a first bandwidth for the bias circuit or a second state to provide a second bandwidth for the bias circuit.Type: ApplicationFiled: August 8, 2016Publication date: February 9, 2017Inventors: Matthew Lee BANOWETZ, Ramanan BAIRAVASUBRAMANIAN, Michael Lynn GERARD, Philip H. THOMPSON
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Publication number: 20170026136Abstract: Disclosed herein are wireless transceivers with switches to reduce harmonic leakage. In some embodiments, a transmitter system includes a power amplification system including a first power amplifier configured to amplify a signal at a first cellular frequency band and a second power amplifier configured to amplify a signal at a second cellular frequency band. The transmitter includes a switch coupled between an output of the second power amplifier and a ground potential. The transmitter includes a controller configured to, based on a band select signal, control the switch and selectively enable or disable each of the first power amplifier and the second power amplifier. Selective control of the switch can reduce harmonic leakage compared to a system that does not include the disclosed switches and controls.Type: ApplicationFiled: July 20, 2016Publication date: January 26, 2017Inventors: Philip H. Thompson, Steven T. Seiz, Roman Zbigniew Arkiszewski, Matthew Lee Banowetz, Duane A. Green
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Publication number: 20170003733Abstract: Systems, devices and methods related to configuring a power amplifier. In some embodiments, a power amplifier may include a general purpose input output (GPIO) lines and a GPIO module. The GPIO module may allow the power amplifier to configure the GPIO lines. Configuring the GPIO lines may allow the PA to have a common design that may be configured or reconfigured to interface with and/or control different types of electronic components.Type: ApplicationFiled: April 29, 2016Publication date: January 5, 2017Inventor: Matthew Lee BANOWETZ
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Patent number: 9473076Abstract: Improved linearity performance for multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.Type: GrantFiled: November 6, 2014Date of Patent: October 18, 2016Assignee: Skyworks Solutions, Inc.Inventors: Jianxing Ni, Michael Lynn Gerard, Ramanan Bairavasubramanian, Dwayne Allen Rowland, Matthew Lee Banowetz
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Patent number: 9413313Abstract: Multimode power amplifier bias circuit with selectable bandwidth. In some embodiments, a bias circuit for a power amplifier can include a first bipolar junction transistor (BJT) configured to pass a reference current. The first BJT can be coupled with a second BJT that performs at least some amplification for the power amplifier. The first and second BJTs can be configured as a current mirror. The bias circuit can further include a coupling circuit that couples the collector and the base of the first BJT. The coupling circuit can include a switchable element to allow the coupling circuit to be in a first state or a second state. The first state can be configured to yield a first bandwidth for the bias circuit, and the second state can be configured to yield a second bandwidth for the bias circuit.Type: GrantFiled: September 9, 2014Date of Patent: August 9, 2016Assignee: Skyworks Solutions, Inc.Inventors: Matthew Lee Banowetz, Ramanan Bairavasubramanian, Michael Lynn Gerard, Philip H. Thompson
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Publication number: 20150349715Abstract: Improved power amplifier (PA) bias circuit having parallel emitter follower. In some embodiments, a bias circuit for a PA can include a first bias path implemented to couple a base node of an amplifying transistor and a supply node, with the first bias path being configured to provide a base bias current to the base node. The PA can further include a second bias path implemented to be electrically parallel with the first bias path between the base node and the supply node. The second bias path can be configured to provide an additional base bias current to the base node under a selected condition.Type: ApplicationFiled: November 3, 2014Publication date: December 3, 2015Inventors: Michael Lynn GERARD, Ramanan BAIRAVASUBRAMANIAN, Dwayne Allen ROWLAND, Matthew Lee BANOWETZ
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Publication number: 20150171797Abstract: Improved linearity performance for multi-mode power amplifiers. A power amplifier (PA) assembly can include a radio-frequency (RF) amplification path having a first stage and a second stage, with each stage including a transistor. The PA assembly can further include a biasing circuit having a first bias path between a supply node and the base of a corresponding transistor. The PA assembly can further include a linearizing circuit implemented as either or both of a second bias path and a coupling path relative to the first bias path. The second bias path can be configured to provide an additional base bias current to the base under a selected condition. The coupling path can be configured to improve linearity of the corresponding transistor operating in a first mode while allowing a ballast resistance to be sufficiently robust for the corresponding transistor operating in a second mode.Type: ApplicationFiled: November 6, 2014Publication date: June 18, 2015Inventors: Jianxing NI, Michael Lynn GERARD, Ramanan BAIRAVASUBRAMANIAN, Dwayne Allen ROWLAND, Matthew Lee BANOWETZ