Abstract: A data storage system has a chassis and a pair of printed circuit boards disposed in the chassis. Each one of the pair of printed circuit boards has disposed thereon a processor, a translator controlled by the processor, a SAS expander having a bidirectional front end port and multiple bidirectional backend ports, and an expansion port, and a SAS controller coupled between the translator and the expander. The system also has an interposer printed circuit board disposed in the chassis, and multiple multiplexers disposed on the interposer printed circuit board. Each one of the multiplexers has a pair of bidirectional front end ports and a pair of bidirectional back end ports. A first one of the pair of bidirectional front end ports is connected to a corresponding backend port of the SAS expander disposed on a first one of the pair of storage processor printed circuit boards.

Abstract: Memory parameters are controlled. A power source capacity estimate is determined. Based on the power source capacity estimate, an amount of cache to enable is determined and is enabled.

Abstract: A technique for managing data within a data storage system involves performing data storage operations on behalf of a set of hosts (i.e., one or more hosts) using a volatile-memory storage cache and a set of magnetic disk drives while the data storage system is being powered by a primary power source (e.g., a main power feed). The technique further involves receiving a power failure signal (e.g., from a sensor) indicating that the data storage system is now being powered by a backup power source rather than by the primary power source (e.g., due to a loss of the main power feed, due to a failure of a power converter, etc.), and moving data from the volatile-memory storage cache of the data storage system to a flash-based memory vault of the data storage system in response to the power failure signal.

Abstract: A system is for use in interconnecting data storage components. The system includes first and second data storage components. The first component has first and second communication boards and first and second ports. The second component has third and fourth communication boards and third and fourth ports. A first cable interconnects the first port and the third port. A second cable interconnects the second port and the fourth port. A first datapath connects the first communication board to the third communication board through the first cable. A second datapath connects the second communication board to the fourth communication board through the second cable. A third datapath connects the first communication board to the third communication board through the second cable. A fourth datapath connects the second communication board to the fourth communication board through the first cable.

Abstract: An improved data storage system has a set of storage devices, a first storage processor and a second storage processor for storing data into and retrieving data from the set of storage devices. The first storage processor includes a processing circuit and a packaged IC device which has a first set of ports and a second set of ports. The processing circuit is adapted to configure the packaged IC device to provide (i) communications to the set of storage devices through the first set of ports and (ii) other communications to the second storage processor through the second set of ports. The processing circuit is further adapted to pass communications between the first storage processor and the set of storage devices through the first set of ports; and pass communications between the first storage processor and the second storage processor through the second set of ports.

Abstract: The invented firearm pistol grip monopod gun stabilizer reduces rifle movement to improve the shooter's aim by using an adjustable elongated member connected inside the firearms pistol grip. A threaded rod assembly provides a means for precise height adjustment while a footpad resting on a supporting surface provides stability during recoil, and while the front of the firearm rest on a bi-pod or other support. A head cap screw on one end of the monopod gun stabilizer connects it to the firearm and a footpad on the other end of the monopod gun stabilizer rests on the ground. In between the two ends a female tubular assembly and a threaded rod assembly provide for precise adjustment for targeting. The monopod gun stabilizer threads into it self for transport and storage.

Abstract: An interconnect structure employs a closed-grid bus to link an integrated circuit tester channel to an array of input/output (I/O) pads on a semiconductor wafer so that the tester channel can concurrently communicate with all of the I/O pads. The interconnect structure includes a circuit board implementing an array of bus nodes, each corresponding to a separate one of the I/O pads. The circuit board includes at least two layers. Traces mounted on a first layer form a set of first daisy-chain buses, each linking all bus nodes of a separate row of the bus node array. Traces mounted on a second circuit board layer form a set of second daisy-chain buses, each linking all bus nodes of a separate column of the bus node array. Vias and other circuit board interconnect ends of the first and second daisy-chain buses so that they form the closed-grid bus. Each bus node is connected though a separate isolation resistor to a separate contact pad mounted on a surface of the circuit board.

Abstract: An interconnect structure employs a closed-grid bus to link an integrated circuit tester channel to an array of input/output (I/O) pads on a semiconductor wafer so that the tester channel can concurrently communicate with all of the I/O pads. The interconnect structure includes a circuit board implementing an array of bus nodes, each corresponding to a separate one of the I/O pads. The circuit board includes at least two layers. Traces mounted on a first layer form a set of first daisy-chain buses, each linking all bus nodes of a separate row of the bus node array. Traces mounted on a second circuit board layer form a set of second daisy-chain buses, each linking all bus nodes of a separate column of the bus node array. Vias and other circuit board interconnect ends of the first and second daisy-chain buses so that they form the closed-grid bus. Each bus node is connected though a separate isolation resistor to a separate contact pad mounted on a surface of the circuit board.

Abstract: An interconnect structure employs a closed-grid bus to link an integrated circuit tester channel to an array of input/output (I/O) pads on a semiconductor wafer so that the tester channel can concurrently communicate with all of the I/O pads. The interconnect structure includes a circuit board implementing an array of bus nodes, each corresponding to a separate one of the I/O pads. The circuit board includes at least two layers. Traces mounted on a first layer form a set of first daisy-chain buses, each linking all bus nodes of a separate row of the bus node array. Traces mounted on a second circuit board layer form a set of second daisy-chain buses, each linking all bus nodes of a separate column of the bus node array. Vias and other circuit board interconnect ends of the first and second daisy-chain buses so that they form the closed-grid bus. Each bus node is connected though a separate isolation resistor to a separate contact pad mounted on a surface of the circuit board.

Abstract: The device consists of different sized and shaped tools for creating free form sand sculptures, contained in a netted bag. The tools range from larger sized tools with grooved handles for heavier shoveling and scraping, to finer shaped tools with smooth handles for detailing work. Children can use the tools to make simple sand sculptures, while adults can also use the tools to create finely crafted sculptures for recreational enjoyment, contests or professional use. The tools and bag are brightly colored, and made of plastic. They are visible if buried in the sand, and float is swept away by the tide. They are durable, easily cleaned, and safe for use by children and use at the beach. The tools can also be used to create snow sculptures.

Abstract: A system for testing both simulated and real versions of an integrated circuit (IC) includes an IC simulator, a simulator manager, an IC tester, and a tester manager. The IC simulator simulates response of the IC to a set of simulated IC input signals by producing a set of simulated IC output signals. The simulator manager, programmed by a user-supplied test bench file, provides the simulated IC input signals to the simulator during the simulation. During the simulation, the simulator manager also generates a set of waveform data sequences, each representing periodically sampled values of a corresponding one of the simulated IC input and output signals. The IC tester includes a separate channel corresponding to each real IC input and output signal. The tester manager converts the waveform data sequence corresponding to each simulated IC input and output signal to a separate set of instructions provided as input to a corresponding one of the IC tester channels.