Abstract: An amplitude and phase modulation circuit for modulating an M-ary digital signal having pulses onto a carrier wave for transmission by direct digital synthesis. The modulation circuit includes a digital source that generates a digital signal including pulses representing logical 1s and no pulses representing logical zeros, where a group of M pulses represents a constellation point to be transmitted. The modulation circuit further includes a phase control circuit that provides phase control and an amplitude control circuit that provides pulse width control for the constellation point to be transmitted. A saturated amplifier amplifies the phase and amplitude controlled digital signal and a filter integrates and averages the digital signal to remove noise from the signal so as to convert the digital signal to an analog signal, where the digital source operates to reduce the amplifier power consumption requirements.

Abstract: An encoder circuit and a related method for its operation, in which digital encoding, such as differential phase-shift keyed (DPSK) encoding, is performed as a parallel operation on N bits at a time. Each encoded bit is both output in parallel with the others of the N bits and is coupled as an input to encode the immediately next bit in the input data stream. The Nth encoded bit is fed back to the first encoder stage for use in encoding the (N+1)th bit in the input stream. The encoder typically includes a serial-to-parallel converter at the encoder inputs, and a parallel-to-serial converter at the encoder outputs.