Abstract: Systems and techniques are provided for random number generation. For instance, a process can include generating, using a first random number generator of a plurality of random number generators, a first random number; inputting the first random number to a first flow engine of a plurality of flow engines, wherein the first flow engine is coupled to a random number consumer, of one or more random number consumers, through a first set of flow engines, of the plurality of flow engines, wherein the plurality of flow engines are unclocked; randomly transforming, by the first set of flow engines, the first random number to a second random number; and buffering the second random number from the first set of flow engines for output to the random number consumer.

Abstract: Systems and techniques for securely performing cryptographic operations are described herein. For example, a process can include obtaining a public data and a security information asset. The process can include performing, by a first computation module, a Boolean operation on the public data and the security information asset to generate an output. The process can include obtaining the public data and the security information asset. The process can include performing, by a second computation module, the Boolean operation on the public data and the security information asset to generate the output. The first computation module has a first configuration and the second computation module has a second configuration, different from the first configuration.

Abstract: Systems and techniques are provided for secure confidential data transmission and secure execution of a cryptographic function (e.g., inside a system-on-a-chip (SoC)). The systems and techniques can be used for secure data encryption and decryption in the presence of physical side channel information leakage. For example, a process can include obtaining a multi-bit input including a plurality of bits. A masking engine can be used to generate a plurality of shares based on the multi-bit input. The masking engine can be a deterministic masking engine. The plurality of shares can be multi-bit shares. The plurality of shares can be transmitted to a cryptographic engine, wherein the plurality of shares jointly represent the multi-bit input based on an exclusive or (XOR) between each respective share of the plurality of shares.

Abstract: Data blocks of an input data unit may be received in parallel as a data segment on a data bus. For each received data segment, tweak values corresponding to the data blocks may be generated using a key and an input vector. The data blocks may be encrypted using parallel encryption circuitry blocks, based on a symmetric block cipher that uses another key and one of the tweak values. The encrypted data blocks may be combined into an output data unit.

Abstract: Techniques for mitigating side-channel attacks on cryptographic algorithms are provided. An example method according to these techniques includes applying a block cipher algorithm to an input data to generate a cryptographic output, such that applying the block cipher to input data comprises modifying an output of a stage of the block cipher algorithm such that each output of the stage of the block cipher algorithm has a constant Hamming weight, and outputting the cryptographic output.

Abstract: Techniques for mitigating side-channel attacks on cryptographic algorithms are provided. An example method according to these techniques includes applying a block cipher algorithm to an input data to generate a cryptographic output, such that applying the block cipher to input data comprises modifying an output of a stage of the block cipher algorithm such that each output of the stage of the block cipher algorithm has a constant Hamming weight, and outputting the cryptographic output.

Abstract: Techniques for mitigating side-channel attacks on cryptographic algorithms are provided. An example method according to these techniques includes applying a block cipher algorithm to an input data to generate a cryptographic output, such that applying the block cipher to input data comprises modifying an output of a stage of the block cipher algorithm such that each output of the stage of the block cipher algorithm has a constant Hamming weight, and outputting the cryptographic output.

Abstract: A cryptographic device includes: a data input; a data output; a cipher circuit configured to perform a cipher algorithm on cipher-algorithm input data to produce cipher-algorithm output data; and a network coupled to the data input, the data output, and the cipher circuit, the network comprising a plurality of switches and a plurality of logical signal combiners that are configured to provide the cipher-algorithm input data to the cipher circuit and to provide device output data to the data output using the cipher-algorithm output data and that, in combination with the cipher circuit, are configured to implement a plurality of different cryptographic algorithms that each include the cipher algorithm that the cipher circuit is configured to perform.