Patents by Inventor Matthew Michael Garcia Pardini

Matthew Michael Garcia Pardini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11675513
    Abstract: A computer-implemented method, according to one embodiment, includes: storing records in an input data buffer, where each of the records include a key which is appended to payload data in the respective record. Moreover, for each of the records: shearing the key associated with the record from the payload data, normalizing the sheared key, and storing the normalized sheared key in a first target area of memory. A determination is made as to whether a size of the payload data in the record is outside a predetermine range, and in response to determining that the size of the payload data in the record is outside the predetermine range, the payload data is stored in a second target area of memory. A data locator is also appended to the normalized sheared key in the first target area of memory to form a sheared record.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: June 13, 2023
    Assignee: International Business Machines Corporation
    Inventors: Scott B. Compton, Jeffrey Richard Suarez, Matthew Michael Garcia Pardini, Christian Jacobi, Dominik Steenken, Sri Hari Kolusu, Vicky Vezinaw
  • Patent number: 11657159
    Abstract: Aspects of the invention include systems and methods for to detecting security vulnerabilities using modeled attribute propagation. A non-limited example of a computer-implemented method includes generating a model of a device under test, the model comprising a data path similar to the device under test and an attribute network. The method further includes detecting protected data that is introduced into the model and marking the protected data with an attribute. An end point of the marked protected data is detected along the data path. In response to the end point being indicative of a vulnerability, an alert is issued.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: May 23, 2023
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew Michael Garcia Pardini, Bodo Hoppe, Zoltan Tibor Hidvegi, Michael P Mullen
  • Publication number: 20230047349
    Abstract: A computer-implemented method, according to one embodiment, includes: storing records in an input data buffer, where each of the records include a key which is appended to payload data in the respective record. Moreover, for each of the records: shearing the key associated with the record from the payload data, normalizing the sheared key, and storing the normalized sheared key in a first target area of memory. A determination is made as to whether a size of the payload data in the record is outside a predetermine range, and in response to determining that the size of the payload data in the record is outside the predetermine range, the payload data is stored in a second target area of memory. A data locator is also appended to the normalized sheared key in the first target area of memory to form a sheared record.
    Type: Application
    Filed: August 16, 2021
    Publication date: February 16, 2023
    Inventors: Scott B. Compton, Jeffrey Richard Suarez, Matthew Michael Garcia Pardini, Christian Jacobi, Dominik Steenken, Sri Hari Kolusu, Vicky Vezinaw
  • Patent number: 11513704
    Abstract: A computer-implemented method, according to one embodiment, includes: processing records by, for each of the records: shearing the key associated with the record from the payload data, normalizing the sheared key, and storing the normalized sheared key in a first target area of memory. A determination is made whether a size of the payload data is outside a first predetermined range. In response to determining that the size of the payload data is outside the first predetermined range, the payload data is stored in a second target area of memory, and a data locator is appended to the normalized sheared key. Furthermore, in response to determining that a storage capacity of the memory is outside a second predetermined range, some of the payload data is transferred to external physical storage. Moreover, an external list is integrated with each of the data locators that correspond to the transferred payload data.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: November 29, 2022
    Assignee: International Business Machines Corporation
    Inventors: Scott B. Compton, Jeffrey Richard Suarez, Matthew Michael Garcia Pardini, Christian Jacobi
  • Patent number: 11443044
    Abstract: A computer-implemented method for advancing speculative execution in microarchitectures is disclosed. A non-limiting example of the computer-implemented method includes receiving, by a processor, a test scenario including a first load instruction from a first memory location flagged with a delay notification and a speculative memory access instruction from a second memory following the first load instruction. The method executes, by the processor, the first load instruction from the first memory location and delays a return of data from the first memory location for a number of processor cycles. The method executes, by the processor, the speculative storage access instruction from the second memory location during the delay in returning the data from the first memory location.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: September 13, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Olaf Knute Hendrickson, Michael P Mullen, Matthew Michael Garcia Pardini
  • Publication number: 20220121752
    Abstract: Aspects of the invention include systems and methods for to detecting security vulnerabilities using modeled attribute propagation. A non-limited example of a computer-implemented method includes generating a model of a device under test, the model comprising a data path similar to the device under test and an attribute network. The method further includes detecting protected data that is introduced into the model and marking the protected data with an attribute. An end point of the marked protected data is detected along the data path. In response to the end point being indicative of a vulnerability, an alert is issued.
    Type: Application
    Filed: October 16, 2020
    Publication date: April 21, 2022
    Inventors: Matthew Michael Garcia Pardini, Bodo Hoppe, Zoltan Tibor Hidvegi, Michael P. Mullen
  • Patent number: 11205005
    Abstract: A computer-implemented method for detecting vulnerabilities in microarchitectures. A non-limiting example of the computer-implemented method includes creating a simulation for execution on a model of a microarchitecture, the simulation including a set of instructions and a placeholder for holding a piece of secret data. The computer-implemented method executes the simulation a first time on the model of the microarchitecture with a first piece of secret data stored in the placeholder and stores a first output of the first executed simulation. The computer-implemented method executes the simulation a second time on the model of the microarchitecture with a second piece of secret data stored in the placeholder and stores a second output of the second executed simulation. The computer-implemented method compares the first output with the second output and provides an indication of a microarchitecture vulnerability when there is a difference between the first output and the second output.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: December 21, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew Michael Garcia Pardini, Gregory William Alexander, Jonathan Ting Hsieh, Michael P Mullen, Olaf Knute Hendrickson
  • Patent number: 11106602
    Abstract: A computer-implemented method includes generating a plurality of test cases to test exploitation of speculative execution in a design of a computer processor, where the plurality of test cases include a first test case. Generating the first test case includes identifying a branch responsive to an attempted access to secure data and, responsive to the branch, marking each memory address of each memory access dependent on the attempted access to the secure data. The computer-implemented method further includes executing the first test case. Executing the first test case includes detecting an attempt to access a memory address that has been marked and, responsive to the attempt to access the memory address that has been marked, alerting of a security violation.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: August 31, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Olaf Hendrickson, Matthew Michael Garcia Pardini, Michael P. Mullen
  • Publication number: 20210089660
    Abstract: A computer-implemented method for advancing speculative execution in microarchitectures is disclosed. A non-limiting example of the computer-implemented method includes receiving, by a processor, a test scenario including a first load instruction from a first memory location flagged with a delay notification and a speculative memory access instruction from a second memory following the first load instruction. The method executes, by the processor, the first load instruction from the first memory location and delays a return of data from the first memory location for a number of processor cycles. The method executes, by the processor, the speculative storage access instruction from the second memory location during the delay in returning the data from the first memory location.
    Type: Application
    Filed: September 23, 2019
    Publication date: March 25, 2021
    Inventors: Olaf Knute Hendrickson, Michael P Mullen, Matthew Michael Garcia Pardini
  • Publication number: 20210089659
    Abstract: A computer-implemented method for detecting vulnerabilities in microarchitectures. A non-limiting example of the computer-implemented method includes creating a simulation for execution on a model of a microarchitecture, the simulation including a set of instructions and a placeholder for holding a piece of secret data. The computer-implemented method executes the simulation a first time on the model of the microarchitecture with a first piece of secret data stored in the placeholder and stores a first output of the first executed simulation. The computer-implemented method executes the simulation a second time on the model of the microarchitecture with a second piece of secret data stored in the placeholder and stores a second output of the second executed simulation. The computer-implemented method compares the first output with the second output and provides an indication of a microarchitecture vulnerability when there is a difference between the first output and the second output.
    Type: Application
    Filed: September 23, 2019
    Publication date: March 25, 2021
    Inventors: Matthew Michael Garcia Pardini, Gregory William Alexander, Jonathan Ting Hsieh, Michael P. Mullen, Olaf Knute Hendrickson
  • Publication number: 20210064550
    Abstract: A computer-implemented method includes generating a plurality of test cases to test exploitation of speculative execution in a design of a computer processor, where the plurality of test cases include a first test case. Generating the first test case includes identifying a branch responsive to an attempted access to secure data and, responsive to the branch, marking each memory address of each memory access dependent on the attempted access to the secure data. The computer-implemented method further includes executing the first test case. Executing the first test case includes detecting an attempt to access a memory address that has been marked and, responsive to the attempt to access the memory address that has been marked, alerting of a security violation.
    Type: Application
    Filed: September 4, 2019
    Publication date: March 4, 2021
    Inventors: Olaf Hendrickson, Matthew Michael Garcia Pardini, Michael P. Mullen