Patents by Inventor Matthew P. Moore

Matthew P. Moore has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8490082
    Abstract: A system, method, and computer program product for representing at least one of a user process and a system process as a software package in a software package management system. The method includes creating at least one package comprising at least one of a user process and a system process. The at least one package comprises a structure consistent with a software package so that the at least one package is able to be managed by a software package management system. The at least one package is stored on an information system via the software package management system.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: July 16, 2013
    Assignee: International Business Machines Corporation
    Inventors: Matthew P. Moore, Jeremy A. Redburn, Frank Schwichtenberg, Alyssa A. Wolf, Jeffrey Yasskin, Benjamin J. Zeigler
  • Patent number: 8122446
    Abstract: An apparatus and method for provisioning software on a network of heterogeneous computers in a network. The provisioner receives a list of packages and deployment scope of the packages, then checks each node for installed applications and records dependency and potential application conflicts. In addition, the provisioner measures a plurality of network and node metrics. Based on the dependency information, conflict information, and metrics, one or more nodes are selected and software is provisioned and/or removed in accordance with the dependency and conflict information.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: February 21, 2012
    Assignee: International Business Machines Corporation
    Inventors: Matthew P. Moore, Jeremy A. Redburn, Frank Schwichtenberg, Alyssa A. Wolf, Jeffrey Yasskin, Benjamin J. Zeigler
  • Patent number: 7831972
    Abstract: An apparatus and method for scheduling a job process on at least one node in a server data processing network. The scheduling is based on a state of at least two nodes in the network as well as a cost metric of installing a required application on at least one of the nodes in the network of nodes. The apparatus and method gathers metrics indicating properties associated with at least two nodes on the network, the metrics including a presence of an application necessary for running the process. A first cost factor for scheduling the process on a node in the network having the application necessary for running the process is compared with a second cost factor for scheduling the process on a node in the network that does not have the application necessary for running the process. Finally, a node in the network is selected for scheduling the process.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: November 9, 2010
    Assignee: International Business Machines Corporation
    Inventors: Matthew P. Moore, Jeremy A. Redburn, Frank Schwichtenberg, Alyssa A. Wolf, Jeffrey Yasskin, Benjamin J. Zeigler
  • Patent number: 5325365
    Abstract: A memory emulation test system is provided with a method of and system for fast functional testing of memories, such as boot ROMs, in microprocessor-based assemblies. The emulative test system includes a synchronization circuit which automatically re-arms itself and generates sync pulses on each and every UUT data access cycle to allow the UUT microprocessor to read every boot ROM memory location and collect data to be computed into a checksum or other signature to be compared with a predetermined signature representative of a correctly functioning and faultless boot ROM.
    Type: Grant
    Filed: October 4, 1991
    Date of Patent: June 28, 1994
    Assignee: John Fluke Mfg. Co., Inc.
    Inventors: Matthew P. Moore, Thomas P. Locke
  • Patent number: 5195096
    Abstract: A method of functionally testing cache tag RAMs in processor systems where the kernel is typically inaccessible. A test program first determines whether a fault exists at all within the cache tag RAM. If a fault is determined to exist, the faulty RAM location is exercised by sequentially applying patterns of ones and zeros until the pattern of bits actually present at the faulty tag RAM location is determined. A comparison of this pattern of bits with the expected bit pattern provides information as the precise location of the fault so as to permit replacement of defective chips.
    Type: Grant
    Filed: March 9, 1992
    Date of Patent: March 16, 1993
    Assignee: John Fluke Mfg. Co., Inc.
    Inventor: Matthew P. Moore