Patents by Inventor Matthew Pace

Matthew Pace has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Caffeine inhibitors of MTHFD2 and uses thereof
    Patent number: 12187728
    Abstract: The present invention provides compounds, compositions thereof, and methods of using the same.
    Type: Grant
    Filed: January 19, 2022
    Date of Patent: January 7, 2025
    Assignee: Raze Therapeutics, Inc.
    Inventors: Nello Mainolfi, Mikel P. Moyer, Eddine Saiah, Cristina Lecci, Robert David Matthew Pace, Heather Tye, Julia Vile
  • Novel compounds for treatment of diseases related to DUX4 expression
    Publication number: 20230271953
    Abstract: The present invention relates to compounds that act as DUX4 repressors, suitable for the treatment of diseases related to DUX4 expression, such as muscular dystrophies. It also relates to use of such compounds, or to methods of use of such compounds.
    Type: Application
    Filed: November 27, 2020
    Publication date: August 31, 2023
    Applicant: Facio Intellectual Property B.V.
    Inventors: Pui Leng Loke, Joris Herman De Maeyer, Robert David Matthew Pace, Simon Fletcher Elwood, Gregory Foulkes, Andrew Anighoro, Ainoa Rueda-Zubiaurre, Jonathan Philip Richards, Adam James Davenport, Cristina Lecci, Anthony Paul Dickie, Gerd Schnorrenberg
  • CAFFEINE INHIBITORS OF MTHFD2 AND USES THEREOF
    Publication number: 20230067237
    Abstract: The present invention provides compounds, compositions thereof, and methods of using the same.
    Type: Application
    Filed: January 19, 2022
    Publication date: March 2, 2023
    Inventors: Nello MAINOLFI, Mikel P. MOYER, Eddine SAIAH, Cristina LECCI, Robert David Matthew PACE, Heather TYE, Julia VILE
  • New compounds for treatment of diseases related to DUX4 expression
    Publication number: 20230052017
    Abstract: The present invention relates to compounds for the treatment of diseases related to DUX4 expression, such as muscular dystrophies. It also relates to use of such compounds, or to methods of use of such compounds.
    Type: Application
    Filed: November 27, 2020
    Publication date: February 16, 2023
    Applicant: Facio Intellectual Property B.V.
    Inventors: Pui Leng Loke, Joris Herman De Maeyer, Robert David Matthew Pace, Gregory Foulkes, Ainoa Rueda-Zubiaurre, Simon Fletcher Ellwood, Adam James Davenport, Anthony Paul Dickie, Gerd Schnorrenberg
  • Caffeine inhibitors of MTHFD2 and uses thereof
    Patent number: 11370792
    Abstract: The present invention provides compounds, compositions thereof, and methods of using the same.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: June 28, 2022
    Assignee: Raze Therapeutics, Inc.
    Inventors: Nello Mainolfi, Mikel P. Moyer, Eddine Saiah, Cristina Lecci, Robert David Matthew Pace, Heather Tye, Julia Vile
  • CAFFEINE INHIBITORS OF MTHFD2 AND USES THEREOF
    Publication number: 20180370972
    Abstract: The present invention provides compounds, compositions thereof, and methods of using the same.
    Type: Application
    Filed: December 14, 2016
    Publication date: December 27, 2018
    Inventors: Nello Mainolfi, Mikel P. Moyer, Eddine Saiah, Cristina Lecci, Robert David Matthew Pace, Heather Tye, Julia Vile
  • Current mode analog signal multiplexing bus and a method thereof
    Patent number: 6693270
    Abstract: A bus system which includes two or more voltage-to-current transformers, a common bus, a terminal bus coupled to a voltage source, two or more first switches, and a selection circuit. Each of the voltage-to-current transformers converts a voltage signal to a current signal. The common bus carries the current signals from the voltage-to-current transformers to an output bus. Each of the first switches has a first position where an output from one of the voltage-to-current transformers is coupled to the common bus and a second position where the output is coupled to the terminal bus. The selection circuit is coupled to each of the first switches and controls movement of each of the first switches between the first and second positions.
    Type: Grant
    Filed: October 26, 2001
    Date of Patent: February 17, 2004
    Assignee: Silicon Video, Inc.
    Inventors: Robert Iodice, Matthew Pace, Jeffrey Zarnowski
  • Video bus for high speed multi-resolution imagers and method thereof
    Patent number: 6633029
    Abstract: A bus system and an imager for transferring signals from a plurality of signal streams to an output includes a plurality of signal buses in parallel and a control system. The control system multiplexes the signals from two or more of the plurality of signal streams onto two or more of the plurality of signal buses and allows the signals to substantially charge each of the two or more of the plurality of signal buses before demultiplexing the signals to the output. A method for transferring signals includes multiplexing signals on to two or more of a plurality of signal buses and allowing the signals to substantially charge each of the two or more of the plurality of signal buses before demultiplexing the signals to an output.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: October 14, 2003
    Assignee: Silicon Video, Inc.
    Inventors: Jeffrey Zarnowski, Matthew Pace, Thomas Vogelsong, Michael Joyner
  • Video bus for high speed multi-resolution imagers
    Patent number: 6590198
    Abstract: An analog video bus architecture that utilizes the column parallel nature of CMOS imagers and more specifically Active Column Sensors, that eliminates the need for multi-port imagers, by increasing the useable bandwidth of single port imagers. An adaptation of this invention allows for either binning or interpolation of pixel information for increased or decreased resolution along the columns and more specifically for ACS imagers binning or interpolation along the rows. In this bus, the single video bus is replaced by multiple video buses and instead of selecting only one column for reading multiple columns are also pre-selected in-order to pre-charge the video bus. The video buses are then de-multiplexed back on to one port at the desired element rate. This architecture utilizes the column oriented video bus of CMOS imagers. It divides the large video bus capacitance by the number of video buses used. In addition, it allows multiple pixel time constants to precharge the video bus.
    Type: Grant
    Filed: January 24, 2000
    Date of Patent: July 8, 2003
    Assignee: Photon Vision Systems, Inc.
    Inventors: Jeffrey Zarnowski, Matthew Pace, Thomas Vogelsong, Michael Joyner
  • Current mode analog signal multiplexing bus and a method thereof
    Publication number: 20020092969
    Abstract: A bus system which includes two or more voltage-to-current transformers, a common bus, a terminal bus coupled to a voltage source, two or more first switches, and a selection circuit. Each of the voltage-to-current transformers converts a voltage signal to a current signal. The common bus carries the current signals from the voltage-to-current transformers to an output bus. Each of the first switches has a first position where an output from one of the voltage-to-current transformers is coupled to the common bus and a second position where the output is coupled to the terminal bus. The selection circuit is coupled to each of the first switches and controls movement of each of the first switches between the first and second positions.
    Type: Application
    Filed: October 26, 2001
    Publication date: July 18, 2002
    Applicant: Photon Vision Systems, Inc.
    Inventors: Robert Iodice, Matthew Pace, Jeffrey Zarnowski
  • Video bus for high speed multi-resolution imagers and method thereof
    Publication number: 20010030702
    Abstract: A bus system and an imager for transferring signals from a plurality of signal streams to an output includes a plurality of signal buses in parallel and a control system. The control system multiplexes the signals from two or more of the plurality of signal streams onto two or more of the plurality of signal buses and allows the signals to substantially charge each of the two or more of the plurality of signal buses before demultiplexing the signals to the output. A method for transferring signals includes multiplexing signals on to two or more of a plurality of signal buses and allowing the signals to substantially charge each of the two or more of the plurality of signal buses before demultiplexing the signals to an output.
    Type: Application
    Filed: January 23, 2001
    Publication date: October 18, 2001
    Inventors: Jeffrey Zarnowski, Matthew Pace, Thomas Vogelsong, Michael Joyner