Patents by Inventor Matthew Parks

Matthew Parks has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220211090
    Abstract: A binding syrup composition for formulating food products containing allulose and low sugar syrups is provided. The binding syrup composition overcomes limitations of allulose-containing products including product stickiness and failure to maintain shape and texture of the products. More particularly, the binding syrup compositions described herein contain low sugar syrups with low mono- and di-saccharide content in combination with allulose to provide binding and textural attributes to the allulose-containing food products that are comparable to full sugar products. Food products containing the allulose binding syrup compositions described herein and methods of making the same are also provided. Beneficially, food products having reduced caloric and sugar content are provided when employing the allulose-containing binding syrup compositions described herein.
    Type: Application
    Filed: April 24, 2020
    Publication date: July 7, 2022
    Inventors: Didem ICOZ, Matthew PARK
  • Publication number: 20220189974
    Abstract: A semiconductor device structure that comprises tiers of alternating dielectric levels and conductive levels and a carbon-doped silicon nitride over the tiers of the staircase structure. The carbon-doped silicon nitride excludes silicon carbon nitride. A method of forming the semiconductor device structure comprises forming stairs in a staircase structure comprising alternating dielectric levels and conductive levels. A carbon-doped silicon nitride is formed over the stairs, an oxide material is formed over the carbon-doped silicon nitride, and openings are formed in the oxide material. The openings extend to the carbon-doped silicon nitride. The carbon-doped silicon nitride is removed to extend the openings into the conductive levels of the staircase structure. Additional methods are disclosed.
    Type: Application
    Filed: March 8, 2022
    Publication date: June 16, 2022
    Inventors: Jun Fang, Fei Wang, Saniya Rathod, Rutuparna Narulkar, Matthew Park, Matthew J. King
  • Publication number: 20220115401
    Abstract: Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. A layer over the conductive levels includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus. In some embodiments the vertically-stacked conductive levels are wordline levels within a NAND memory array. Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. Vertically-stacked NAND memory cells are along the conductive levels within a memory array region. A staircase region is proximate the memory array region. The staircase region has electrical contacts in one-to-one correspondence with the conductive levels. A layer is over the memory array region and over the staircase region. The layer includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus.
    Type: Application
    Filed: December 20, 2021
    Publication date: April 14, 2022
    Applicant: Micron Technology, Inc.
    Inventors: Justin B. Dorhout, Fei Wang, Chet E. Carter, Ian Laboriante, John D. Hopkins, Kunal Shrotri, Ryan Meyer, Vinayak Shamanna, Kunal R. Parekh, Martin C. Roberts, Matthew Park
  • Patent number: 11282845
    Abstract: A semiconductor device structure that comprises tiers of alternating dielectric levels and conductive levels and a carbon-doped silicon nitride over the tiers of the staircase structure. The carbon-doped silicon nitride excludes silicon carbon nitride. A method of forming the semiconductor device structure comprises forming stairs in a staircase structure comprising alternating dielectric levels and conductive levels. A carbon-doped silicon nitride is formed over the stairs, an oxide material is formed over the carbon-doped silicon nitride, and openings are formed in the oxide material. The openings extend to the carbon-doped silicon nitride. The carbon-doped silicon nitride is removed to extend the openings into the conductive levels of the staircase structure. Additional methods are disclosed.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: March 22, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Jun Fang, Fei Wang, Saniya Rathod, Rutuparna Narulkar, Matthew Park, Matthew J. King
  • Publication number: 20220036804
    Abstract: A method for processing data for display on a screen involves encoding, using a first colour space, a first portion of image data intended to be displayed on a first area of the screen and encoding, using a second colour space, a second portion of image data intended to be displayed on a second area of the screen. The encoded first and second portions of the image data are compressed, and transmitted over a link for display on the screen. By using different colour spaces to encode image data that is displayed in different parts of a screen, differences in a users vision and/or aberrations caused by display equipment may be accounted for and so provide an improved user experience. Using different colour spaces for different screen areas may also reduce the amount of data that needs to be transmitted, for example by encoding image data more effectively and/or allowing more efficient compression of data.
    Type: Application
    Filed: October 20, 2021
    Publication date: February 3, 2022
    Inventors: Patrick Cooper, Matthew Parks, Colin Skinner
  • Publication number: 20220037360
    Abstract: A device comprises an array of elevationally-extending transistors and a circuit structure adjacent and electrically coupled to the elevationally-extending transistors of the array. The circuit structure comprises a stair step structure comprising vertically-alternating tiers comprising conductive steps that are at least partially elevationally separated from one another by insulative material. Operative conductive vias individually extend elevationally through one of the conductive steps at least to a bottom of the vertically-alternating tiers and individually electrically couple to an electronic component below the vertically-alternating tiers. Dummy structures individually extend elevationally through one of the conductive steps at least to the bottom of the vertically-alternating tiers. Methods are also disclosed.
    Type: Application
    Filed: October 18, 2021
    Publication date: February 3, 2022
    Applicant: Micron Technology, Inc.
    Inventors: Paolo Tessariol, Justin B. Dorhout, Indra V. Chary, Jun Fang, Matthew Park, Zhiqiang Xie, Scott D. Stull, Daniel Osterberg, Jason Reece, Jian Li
  • Patent number: 11239252
    Abstract: Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. A layer over the conductive levels includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus. In some embodiments the vertically-stacked conductive levels are wordline levels within a NAND memory array. Some embodiments include an integrated structure having vertically-stacked conductive levels alternating with dielectric levels. Vertically-stacked NAND memory cells are along the conductive levels within a memory array region. A staircase region is proximate the memory array region. The staircase region has electrical contacts in one-to-one correspondence with the conductive levels. A layer is over the memory array region and over the staircase region. The layer includes silicon, nitrogen, and one or more of carbon, oxygen, boron and phosphorus.
    Type: Grant
    Filed: June 22, 2020
    Date of Patent: February 1, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Justin B. Dorhout, Fei Wang, Chet E. Carter, Ian Laboriante, John D. Hopkins, Kunal Shrotri, Ryan Meyer, Vinayak Shamanna, Kunal R. Parekh, Martin C. Roberts, Matthew Park
  • Publication number: 20220012004
    Abstract: A method of healing an image in a display system having a host device and a display control device includes generating healing updates corresponding to a region of the image and generating other display data at the host device, allocating, by the host device or the display control device, at least a portion of a resource of the display system to be used at least preferentially for at least one of encoding, decoding, transmitting and/or storing the healing updates rather than the other display data, encoding the healing updates and the other display data at the host device, transmitting the encoded healing updates and the other encoded display data from the host device to the display control device, decoding the encoded healing updates and the other encoded display data at the display control device, and healing the image using the decoded healing updates at the display control device.
    Type: Application
    Filed: June 2, 2021
    Publication date: January 13, 2022
    Inventor: Matthew PARKS
  • Publication number: 20210383738
    Abstract: A method of presenting visual information on a screen (306) involves defining a boundary (314) delineating a first region of the screen (which may be towards a centre of the screen) from a second region of the screen (which may be towards a periphery of the screen), displaying a first portion of the visual information in the first region of the screen at a first display quality, and displaying a second portion of the visual information in the second region of the screen at a second, lower, display quality. The method further involves blurring the visual information for display in at least a portion of the second region. The location of the boundary (314) may change over time, and may be based on where a user is looking, or is expected to be looking, or on the type of information being displayed or based on other parameters.
    Type: Application
    Filed: August 19, 2021
    Publication date: December 9, 2021
    Inventor: Matthew Parks
  • Patent number: 11183104
    Abstract: A method for processing data for display on a screen involves encoding, using a first colour space, a first portion of image data intended to be displayed on a first area of the screen and encoding, using a second colour space, a second portion of image data intended to be displayed on a second area of the screen. The encoded first and second portions of the image data are compressed, and transmitted over a link for display on the screen. By using different colour spaces to encode image data that is displayed in different parts of a screen, differences in a user's vision and/or aberrations caused by display equipment may be accounted for and so provide an improved user experience. Using different colour spaces for different screen areas may also reduce the amount of data that needs to be transmitted, for example by encoding image data more effectively and/or allowing more efficient compression of data.
    Type: Grant
    Filed: January 8, 2019
    Date of Patent: November 23, 2021
    Assignee: DISPLAYLINK (UK) LIMITED
    Inventors: Patrick Cooper, Matthew Parks, Colin Skinner
  • Patent number: 11177271
    Abstract: A device comprises an array of elevationally-extending transistors and a circuit structure adjacent and electrically coupled to the elevationally-extending transistors of the array. The circuit structure comprises a stair step structure comprising vertically-alternating tiers comprising conductive steps that are at least partially elevationally separated from one another by insulative material. Operative conductive vias individually extend elevationally through one of the conductive steps at least to a bottom of the vertically-alternating tiers and individually electrically couple to an electronic component below the vertically-alternating tiers. Dummy structures individually extend elevationally through one of the conductive steps at least to the bottom of the vertically-alternating tiers. Methods are also disclosed.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: November 16, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Paolo Tessariol, Justin B. Dorhout, Indra V. Chary, Jun Fang, Matthew Park, Zhiqiang Xie, Scott D. Stull, Daniel Osterberg, Jason Reece, Jian Li
  • Publication number: 20210343624
    Abstract: A method used in forming a memory array and conductive through-array-vias (TAVs) comprises forming a stack comprising vertically-alternating insulative tiers and wordline tiers. A mask is formed comprising horizontally-elongated trench openings and operative TAV openings above the stack. Etching is conducted of unmasked portions of the stack through the trench and operative TAV openings in the mask to form horizontally-elongated trench openings in the stack and to form operative TAV openings in the stack. Conductive material is formed in the operative TAV openings in the stack to form individual operative TAVs in individual of the operative TAV openings in the stack. A wordline-intervening structure is formed in individual of the trench openings in the stack.
    Type: Application
    Filed: July 6, 2021
    Publication date: November 4, 2021
    Applicant: Micron Technology, Inc.
    Inventors: Indra V. Chary, Chet E. Carter, Anilkumar Chandolu, Justin B. Dorhout, Jun Fang, Matthew J. King, Brett D. Lowe, Matthew Park, Justin D. Shepherdson
  • Patent number: 11127338
    Abstract: A method of presenting visual information on a screen (306) involves defining a boundary (314) delineating a first region of the screen (which may be towards a centre of the screen) from a second region of the screen (which may be towards a periphery of the screen), displaying a first portion of the visual information in the first region of the screen at a first display quality, and displaying a second portion of the visual information in the second region of the screen at a second, lower, display quality. The method further involves blurring the visual information for display in at least a portion of the second region. The location of the boundary (314) may change over time, and may be based on where a user is looking, or is expected to be looking, or on the type of information being displayed or based on other parameters.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: September 21, 2021
    Assignee: DISPLAYLINK (UK) LIMITED
    Inventor: Matthew Parks
  • Patent number: 11114379
    Abstract: A method used in forming integrated circuitry comprises forming a stack of vertically-alternating tiers of different composition materials. A stair-step structure is formed into the stack and an upper landing is formed adjacent and above the stair-step structure. The stair-step structure is formed to comprise vertically-alternating tiers of the different composition materials. A plurality of stairs individually comprise two of the tiers of different composition materials. At least some of the stairs individually have only two tiers that are each only of a different one of the different composition materials. An upper of the stairs that is below the upper landing comprises at least four of the tiers of different composition materials. Structure independent of method is disclosed.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: September 7, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Michael J. Gossman, M. Jared Barclay, Matthew J. King, Eldon Nelson, Matthew Park, Jason Reece, Lifang Xu, Bo Zhao
  • Publication number: 20210268643
    Abstract: Simulated motion of the papillary muscles in a heart simulator is provided that simulates natural motion of the papillary muscles. This improves heart valve simulation. This can be done with a six degree of freedom robotic actuator (e.g., a Stewart platform or the like) appropriately driven by a controller. This can also be done with a robotic actuator that provides constrained motion of its effector by including a mechanical linkage, as long as the resulting simulated papillary muscle motion includes time-varying position and orientation of the papillary muscle.
    Type: Application
    Filed: March 1, 2021
    Publication date: September 2, 2021
    Inventors: Y. Joseph Woo, Michael John Paulsen, Annabel M. Imbrie-Moore, Matthew Park, Rohun Kulkarni
  • Patent number: 11069598
    Abstract: A method used in forming a memory array and conductive through-array-vias (TAVs) comprises forming a stack comprising vertically-alternating insulative tiers and wordline tiers. A mask is formed comprising horizontally-elongated trench openings and operative TAV openings above the stack. Etching is conducted of unmasked portions of the stack through the trench and operative TAV openings in the mask to form horizontally-elongated trench openings in the stack and to form operative TAV openings in the stack. Conductive material is formed in the operative TAV openings in the stack to form individual operative TAVs in individual of the operative TAV openings in the stack. A wordline-intervening structure is formed in individual of the trench openings in the stack.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: July 20, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Indra V. Chary, Chet E. Carter, Anilkumar Chandolu, Justin B. Dorhout, Jun Fang, Matthew J. King, Brett D. Lowe, Matthew Park, Justin D. Shepherdson
  • Patent number: 10962773
    Abstract: In virtual-reality display devices it is possible to use head movement as an input to compression, which assumes that the user is looking at something that is moving at approximately the same rate in the same direction as the user's head. This method determines whether an eye of a user of a head mounted display is directed at a relatively fixed point. The method involves detecting (S51) a movement of the user's head, including a lack of movement thereof, determining (S53) a direction of the movement of the user's head, detecting (S52) movement of at least one eye of the user, including a lack of movement thereof, and determining (S54) a direction of the movement of the user's eye.
    Type: Grant
    Filed: July 5, 2019
    Date of Patent: March 30, 2021
    Assignee: DISPLAYLINK (UK) LIMITED
    Inventor: Matthew Parks
  • Publication number: 20210014503
    Abstract: Sensor information is received (S41) at a host device from a mobile device. A pose of the mobile device is then determined by the host device based on the received sensor information. The pose of the mobile device is compared with pose information (S42) of previous poses of the mobile device, each previous pose of the mobile device being associated with a performance level of the system for data transmitted from the host device and received and output at the mobile device having that previous pose.
    Type: Application
    Filed: March 13, 2019
    Publication date: January 14, 2021
    Inventor: Matthew Parks
  • Publication number: 20200402890
    Abstract: A method used in forming a memory array and conductive through-array-vias (TAVs) comprises forming a stack comprising vertically-alternating insulative tiers and wordline tiers. A mask is formed comprising horizontally-elongated trench openings and operative TAV openings above the stack. Etching is conducted of unmasked portions of the stack through the trench and operative TAV openings in the mask to form horizontally-elongated trench openings in the stack and to form operative TAV openings in the stack. Conductive material is formed in the operative TAV openings in the stack to form individual operative TAVs in individual of the operative TAV openings in the stack. A wordline-intervening structure is formed in individual of the trench openings in the stack.
    Type: Application
    Filed: June 18, 2019
    Publication date: December 24, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Indra V. Chary, Chet E. Carter, Anilkumar Chandolu, Justin B. Dorhout, Jun Fang, Matthew J. King, Brett D. Lowe, Matthew Park, Justin D. Shepherdson
  • Publication number: 20200327700
    Abstract: A method for processing data for display on a screen involves encoding, using a first colour space, a first portion of image data intended to be displayed on a first area of the screen and encoding, using a second colour space, a second portion of image data intended to be displayed on a second area of the screen. The encoded first and second portions of the image data are compressed, and transmitted over a link for display on the screen. By using different colour spaces to encode image data that is displayed in different parts of a screen, differences in a user's vision and/or aberrations caused by display equipment may be accounted for and so provide an improved user experience. Using different colour spaces for different screen areas may also reduce the amount of data that needs to be transmitted, for example by encoding image data more effectively and/or allowing more efficient compression of data.
    Type: Application
    Filed: January 8, 2019
    Publication date: October 15, 2020
    Inventors: Patrick Cooper, Matthew Parks, Colin Skinner