Patents by Inventor Matthew Paul Wakeley

Matthew Paul Wakeley has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8006046
    Abstract: One embodiment of the present invention is a virtual disk formatting system includes a mass-storage device having physical sectors that each contains a data payload of a first data length and additional information, including one or more of a sector number, error-detection, and error-correction information and a virtual disk interface to the mass-storage device, implemented in an integrated circuit, that maps access operations, received from external entities by the virtual disk interface, directed to a virtual disk having virtual sectors containing a data payload of a second data length by contiguously mapping an array of virtual-sector data payloads to a contiguous array of physical-sector data payloads without introducing padding data into physical-sector data payloads or into virtual-sector data payloads to align the initial bytes of virtual sectors and physical sectors.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: August 23, 2011
    Assignee: Sierra Logic
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Matthew Paul Wakeley
  • Publication number: 20100064104
    Abstract: An integrated circuit implementing a storage-shelf router used alone, or in combination with other storage-shelf routers, and in combination with path controller cards, to interconnect the disks within a storage shelf or disk array to a high-bandwidth communications medium through which data is exchanged between the individual disk drives of the storage shelf and a disk-array controller. In various embodiments, the present invention provides virtual disk formatting by a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers.
    Type: Application
    Filed: November 12, 2009
    Publication date: March 11, 2010
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Matthew Paul Wakeley
  • Patent number: 7634614
    Abstract: An integrated circuit implementing a storage-shelf router used alone, or in combination with other storage-shelf routers, and in combination with path controller cards, to interconnect the disks within a storage shelf or disk array to a high-bandwidth communications medium through which data is exchanged between the individual disk drives of the storage shelf and a disk-array controller. In various embodiments, the present invention provides virtual disk formatting by a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: December 15, 2009
    Assignee: Sierra Logic
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Matthew Paul Wakeley
  • Patent number: 7353321
    Abstract: An integrated circuit implementing a storage-shelf router used alone, or in combination with other storage-shelf routers, and in combination with path controller cards, to interconnect the disks within a storage shelf or disk array to a high-bandwidth communications medium, such as an FC arbitrated loop, through which data is exchanged between the individual disk drives of the storage shelf and a disk-array controller. A set of interconnected storage-shelf routers within a storage shelf can be accessed through a single port of an FC arbitrated loop or other high-bandwidth communications medium. Because, in one implementation, eight storage-shelf routers can be interconnected within a storage shelf to provide highly available interconnection of sixty-four disk drives within the storage shelf to an FC arbitrated loop via a single FC-arbitrated-loop port, a single FC arbitrated loop including a disk-array controller, may interconnect 8,000 individual disk drives to the disk-array controller within a disk array.
    Type: Grant
    Filed: June 23, 2003
    Date of Patent: April 1, 2008
    Assignee: Sierra Logic
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Matthew Paul Wakeley, Jeffrey Douglas Scotten
  • Patent number: 7320084
    Abstract: Embodiments of the present invention include a storage-shelf-router-to-disk-drive interconnection method within a high-availability storage shelf amenable to dynamic reorganization in order to ameliorate error conditions that arise within the high-availability storage shelf. In one embodiment, each path-controller card within the storage shelf is interconnected to two storage-shelf routers on separate storage-shelf-router cards via two serial management links and two serial data links. Different types of errors that may arise within the storage shelf are carefully classified with respect to a number of different error-handling techniques, including local path failovers, single path failovers, error reporting and logging, and other types of error handling techniques. In many implementations, particular error handling methods are conifigurably associated with particular errors, in order to adapt error behavior in a storage shelf to the needs and requirements of a system that includes the storage shelf.
    Type: Grant
    Filed: April 22, 2004
    Date of Patent: January 15, 2008
    Assignee: Sierra Logic
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Matthew Paul Wakeley
  • Patent number: 7167929
    Abstract: An integrated circuit implementing a storage-shelf router, used in combination with path controller cards and optionally with other storage-shelf routers, to interconnect SATA disks within a storage shelf or disk array to a high-bandwidth communications medium, such as an FC arbitrated loop. Various embodiments of the present invention provide a tunneling mechanism through the storage-shelf interface provided by one or more storage-shelf routers within a storage shelf to enable external processing entities to directly access various components within the storage shelf. In one embodiment of the present invention, a WRITE-BUFFER command and a READ-BUFFER command are added to the command interface supported by storage-shelf router. These commands are exchanged via the FCP protocol over the fiber channel in the same manner that SCSI commands are packaged within the FCP protocol.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: January 23, 2007
    Assignee: Sierra Logic
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Matthew Paul Wakeley
  • Patent number: 6978457
    Abstract: A method for replacing finite state machine hardware implementations of controllers and controller subcomponents with implementations based on manipulating contexts stored within common data structures, such as linked lists, and an outbound sequence manager subcomponent of a fibre channel interface controller implemented by this method. A state transition diagram is analyzed to define managers within the controller, along with commands received by, and generated by, each manager. Data structures are chosen for each manager to store contexts representing tasks currently operated on by the manager. An additional manger and interface are designed for a data-structure-manipulation manager. Finally, the operations performed by the managers are defined and implemented, with sequencing of operations controlled by transfer of contexts between data structures by the data-structure-manipulation manager.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: December 20, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Manraj Singh Johl, Joseph Harold Steinmetz, Matthew Paul Wakeley
  • Patent number: 6791989
    Abstract: A method and system for non-blocking processing of data frames and link-control frames within an interface controller component of a fiber channel node. Separate FIFO queues are provided for queuing incoming FC data frames and ACK frames and a separate FIFO queue and list are provided for queuing outgoing FC data frames and buffering outgoing ACK frames. An outbound sequence manager component of the interface controller directly processes incoming ACK frames, transforming them into end-to-end credits that allow the outbound sequence manager to transmit additional FC data frames to the remote node that sent the processed ACK frame. Thus, processing of ACK frames, unlike in prior art interface controller implementations, is neither delayed nor blocked by previously received, but as yet unprocessed, FC data frames.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: September 14, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Joseph Harold Steinmetz, Matthew Paul Wakeley
  • Publication number: 20040148461
    Abstract: An integrated circuit implementing a storage-shelf router used alone, or in combination with other storage-shelf routers, and in combination with path controller cards, to interconnect the disks within a storage shelf or disk array to a high-bandwidth communications medium through which data is exchanged between the individual disk drives of the storage shelf and a disk-array controller. In various embodiments, the present invention provides virtual disk formatting by a storage shelf router and the storage shelf in which the storage-shelf is included, to external computing entities, such as disk-array controllers and host computers.
    Type: Application
    Filed: November 4, 2003
    Publication date: July 29, 2004
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Matthew Paul Wakeley
  • Publication number: 20040148460
    Abstract: An integrated circuit implementing a storage-shelf router, used in combination with path controller cards and optionally with other storage-shelf routers, to interconnect SATA disks within a storage shelf or disk array to a high-bandwidth communications medium, such as an FC arbitrated loop. Various embodiments of the present invention provide a tunneling mechanism through the storage-shelf interface provided by one or more storage-shelf routers within a storage shelf to enable external processing entities to directly access various components within the storage shelf. In one embodiment of the present invention, a WRITE-BUFFER command and a READ-BUFFER command are added to the command interface supported by storage-shelf router. These commands are exchanged via the FCP protocol over the fiber channel in the same manner that SCSI commands are packaged within the FCP protocol.
    Type: Application
    Filed: November 4, 2003
    Publication date: July 29, 2004
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Matthew Paul Wakeley
  • Publication number: 20040139260
    Abstract: An integrated circuit implementing a storage-shelf router used alone, or in combination with other storage-shelf routers, and in combination with path controller cards, to interconnect the disks within a storage shelf or disk array to a high-bandwidth communications medium, such as an FC arbitrated loop, through which data is exchanged between the individual disk drives of the storage shelf and a disk-array controller. A set of interconnected storage-shelf routers within a storage shelf can be accessed through a single port of an FC arbitrated loop or other high-bandwidth communications medium. Because, in one implementation, eight storage-shelf routers can be interconnected within a storage shelf to provide highly available interconnection of sixty-four disk drives within the storage shelf to an FC arbitrated loop via a single FC-arbitrated-loop port, a single FC arbitrated loop including a disk-array controller, may interconnect 8,000 individual disk drives to the disk-array controller within a disk array.
    Type: Application
    Filed: June 23, 2003
    Publication date: July 15, 2004
    Inventors: Joseph Harold Steinmetz, Murthy Kompella, Matthew Paul Wakeley, Jeffrey Douglas Scotten
  • Patent number: 6578096
    Abstract: A method and system for more efficient completion of host-initiated FC I/O operations. Rather than returning FCP response frames from an FC port to host memory within an FC node, the FC port determines, from the content of received FCP response frames, whether or not an I/O operation has successfully completed. In the common case that I/O operations successfully complete, successful completion is indicated to the host processor of the FC node via a single bit flag within a completion message queued to a queue within the host memory. In the uncommon case that an I/O operation unsuccessfully completes, the FC port queues the FC response frame received from the target node to a queue within the host memory and a completion message queued to a queue within the host memory with the single bit flag set to indicate that an error has occurred.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: June 10, 2003
    Assignee: Agilent Technologies, Inc.
    Inventors: Joseph H Steinmetz, Matthew Paul Wakeley
  • Patent number: 6526458
    Abstract: A method and system for enhancing the efficiency of the completion of host-initiated I/O operations within a fiber channel node. The host computer component of the fiber channel node does not allocate the memory buffer for the FCP response frame received by the FC node at the completion of an I/O operation. Instead, the interface controller of the FC node processes FCP response frames in order to determine whether or not an I/O operation successfully completes. In the common case that the I/O operation successfully completes, the interface controller writes the FCP exchange ID corresponding to the I/O operation to a special location in memory which serves to invoke logic functions implemented in an ASIC that de-allocate host memory resources allocated for the I/O operation.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: February 25, 2003
    Assignee: Agilent Technologies, Inc.
    Inventors: Joseph H. Steinmetz, Matthew Paul Wakeley, Murthy Kompella, Bryan Cowger
  • Patent number: 6477171
    Abstract: A method and system for automatic negotiation of maximal shared data transmission and reception rates by fibre channel nodes in a fibre channel arbitrated loop. An auto-speed-negotiation function is included in the fibre channel arbitrated loop initialization procedure. A fibre channel node undergoing initialization turns off its transmitter in order to elicit a loss of synchronization condition in the next fibre channel node of the arbitrated loop. Upon detection of loss of synchronization, each subsequent fibre channel arbitrated loop node invokes the auto-speed-negotiation function. The fibre channel node then turns its transmitter back on at the highest possible data transmission rate, sets the data reception rate of the fibre channel node's receiver to the lowest possible data reception rate, and then waits to detect word synchronization by the receiver.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: November 5, 2002
    Assignee: Agilent Technologies, Inc.
    Inventors: Matthew Paul Wakeley, George McDavid