Abstract: The present invention is generally directed to various methods of controlling optical properties of a capping insulating layer on memory devices, and system for performing same. The method includes forming a first capping layer that includes at least one process layer above a memory cell formed above a first semiconducting substrate, measuring at least one optical characteristic of the first capping layer and determining at least one parameter of a deposition process to form a second capping layer that includes at least one process layer above a memory cell formed above a second semiconducting substrate based upon the measured optical characteristic of the first capping layer.

Abstract: The present invention is generally directed to various methods and systems for dynamically adjusting metrology sampling based upon available metrology capacity. In one illustrative embodiment, the method comprises providing a metrology control unit that is adapted to determine a baseline metrology sampling rate for at least one metrology operation, determining available metrology capacity, and providing the determined available metrology capacity to the metrology control unit wherein the metrology control unit determines a new metrology sampling rate based upon the determined available metrology capacity.

Abstract: The present invention is generally directed to various methods and systems for prioritizing material to clear exception conditions. In one illustrative embodiment, the method includes providing a plurality of workpieces, each of the workpieces having an associated quantity of material that cannot be processed until the workpiece has been processed, and determining a priority for processing each of the plurality of workpieces based upon at least the associated quantity of material that cannot be processed.

Abstract: A method and apparatus is provided for fault detection spanning multiple processes. The method comprises receiving operational data associated with a first process, receiving operational data associated with a second process, which is downstream to the first process and performing fault detection analysis based on the operational data associated with the first process and second process using a common fault detection unit.

Abstract: The present invention is generally directed to various methods and systems for adaptive metrology sampling plans that may be employed to monitor various manufacturing processes. In one example, the method includes creating a plurality of metrology sampling rules, assigning each of the metrology sampling rules a sampling weight value, identifying at least one workpiece that satisfies at least one of the metrology sampling rules, assigning the sampling weight value for each of the satisfied metrology sampling rules with the identified workpieces that satisfy the rules, and indicating a metrology operation should be performed when a cumulative total of the sampling weight values is at least equal to a pre-established trigger value.

Abstract: A method and an apparatus are provided for verifying a fault detection result in a system. The apparatus includes an interface and a control unit. The interface is adapted to receive data associated with a process operation and adapted to receive information provided by a process controller associated with the process operation. The control unit, which is communicatively coupled to the interface, is adapted to perform a fault detection analysis based on the data associated with the process operation and verify a result of the fault detection analysis based on the information provided by the process controller.

Abstract: A method and an apparatus for matching data related to an integrated metrology tool and a standalone metrology tool. At least one semiconductor wafer is processed. An integrated metrology tool and/or a standalone metrology tool is matched based upon a difference between metrology data relating to a processed semiconductor wafer acquired by the integrated metrology tool and metrology data acquired by the standalone metrology tool, using a controller.

Abstract: A method comprised of forming a process layer above a wafer, forming an ARC layer above the process layer, determining at least one optical characteristic of the ARC layer, and determining, based upon the determined optical characteristic of the ARC layer, at least one parameter of a stepper exposure process. The present invention is also directed to a system that may be used to perform the methods described herein. In one embodiment, the system is comprised of an optical metrology tool for measuring at least one optical characteristic of an ARC layer formed above a process layer, a controller for determining, based upon data obtained from the optical metrology tool, at least one parameter of a stepper exposure process, and a stepper tool for performing the exposure process comprised of the determined at least one parameter.

Abstract: A method and an apparatus for selectively applying correction to a process control. Manufacturing data relating to the processing of a workpiece is acquired. The manufacturing data includes metrology data relating to the processed workpiece. An adjustment for at least a first or a second control input parameter is determined based upon the manufacturing data. The first and second control input parameters are organized to isolate the first control input parameter from the second control input parameter for adjusting at least one of the first and the second control input parameters, using a controller.

Abstract: A method and an apparatus for adjusting a process controller based upon a fault detection analysis. A process step upon a workpiece is performed using a processing tool. Manufacturing data relating to processing of the workpiece is acquired. The manufacturing data may include metrology data relating to the processed workpiece and/or tool state data relating to the tool state of a processing tool. A metrology/tool state data integration process is performed based upon the acquired manufacturing data. The metrology/tool state data integration process includes performing an assessment of a tool health related to the processing tool and adjusting an emphasis of the metrology data based upon the assessment of the tool health.

Abstract: The present invention relates generally to exercising equipment, and more particularly, to an improved multi-use weight lifting apparatus. The present weight lifting apparatus comprises a frame (12), a vertical guide member (52), at least one horizontal guide member (46), a weight bearing bar (60), and a safety catch mechanism (70). This weight lifting apparatus allows a weight lifter to perform exercise with vertical and horizontal ranges of motion that simulate the natural motions of using free weights while providing safety mechanisms that are not available with free weights.

Abstract: The present invention is generally directed to various methods and systems for adaptive metrology sampling plans that may be employed to monitor various manufacturing processes. In one example, the method comprises creating a plurality of metrology sampling rules, assigning each of the metrology sampling rules a sampling weight value, identifying at least one workpiece that satisfies at least one of the metrology sampling rules, assigning the sampling weight value for each of the satisfied metrology sampling rules with the identified workpieces that satisfy the rules, and indicating a metrology operation should be performed when a cumulative total of the sampling weight values is at least equal to a pre-established trigger value.

Abstract: The present invention is generally directed to various methods of controlling Vss implants on memory devices, and a system for performing same. In one illustrative embodiment, the method comprises forming a plurality of trenches in a semiconducting substrate, measuring at least one physical characteristic of at least one of the trenches and determining at least one parameter of a VSS implant process to be performed on the substrate based upon the measured at least one physical characteristic of at least one trench.

Abstract: A method includes scheduling a plurality of workpieces for processing by a plurality of tools. Each workpiece has an associated priority. The processing in at least one of the tools is controlled in accordance with a process control model. A process control request associated with the controlling of the tool is generated. The priorities of at least a subset of the workpieces are determined based on the process control request. A manufacturing system includes a plurality of tools for processing workpieces, a dispatch unit, and a process control unit. The dispatch unit is configured to schedule a plurality of workpieces for processing by the tools. Each workpiece has an associated priority. The process control unit is configured to control the processing in at least one of the tools in accordance with a process control model and generate a process control request associated with the controlling of the tool.

Abstract: A method and an apparatus for the determination of a process flow based upon fault detection. A process step upon a workpiece is performed. Fault detection analysis based upon the process step performed upon the workpiece is performed. A workpiece routing process is performed based upon the fault detection analysis. The wafer routing process includes using a controller to perform one or a rework process routing, a non-standard process routing, a fault verification process routing, a normal process routing, or a termination process routing, based upon the fault detection analysis.

Abstract: The present invention is directed to a method of controlling an etching process used to form a gate electrode on a semiconductor device. In one embodiment, the method comprises forming a layer of silicon dioxide above a semiconducting substrate, and forming a layer of polysilicon above the layer of silicon dioxide. The method further comprises sensing a thickness of the layer of polysilicon and adjusting, based upon the sensed thickness of said layer of polysilicon, at least one parameter of an etching process to be performed on said layer of polysilicon to define a gate electrode of a transistor, said etching process comprised of at least a timed etch process and an endpoint etch process.

Abstract: A method and an apparatus are provided for performing run-to-run control of trench profiles. At least one semiconductor wafer is processed. A trench metrology data from the processed semiconductor wafer is acquired. Data relating to at least one process chamber characteristic is acquired while processing the semiconductor wafer. A chamber characteristic adjustment process is performed in response to the trench metrology data and the data relating to the processing chamber characteristic. A feedback adjustment of the processing chamber characteristic is performed in response to the chamber characteristic adjustment process.

Abstract: A method and an apparatus for performing a process control using partial measurement data. A process operation is performed on a semiconductor wafer. Inline metrology data related to the process of the semiconductor wafer is acquired. A partial measurement data acquisition process is performed based upon the inline metrology data, the partial measurement data acquisition process comprising determining a time period for acquiring the inline metrology data, determining a number of wafers to be sampled based upon the time period, and determining a number of wafer sites for data acquisition. At least one of a feedback adjustment on a second semiconductor wafer and a feed-forward adjustment relating to a subsequent processing of the first semiconductor wafer based upon the partial measurement data acquisition process is performed.

Abstract: A method for characterizing a misprocessed wafer includes providing a wafer having a grating structure; illuminating at least a portion of the grating structure; measuring light reflected from the grating structure to generate a reflection profile; and characterizing a misprocessed condition of the wafer based on the reflection profile. A metrology tool adapted to receive a wafer having a grating structure includes a light source, a detector, and a data processing unit. The light source is adapted to illuminate at least a portion of the grating structure. The detector is adapted to measure light reflected from the grating structure to generate a reflection profile. The data processing unit is adapted to characterize a misprocessed condition of the wafer based on the reflection profile.

Abstract: A method of using scatterometry measurements to determine and control conductive interconnect profiles is disclosed. In one embodiment, the method comprises providing a library of optical characteristic traces, each of which correspond to a grating structure comprised of a plurality of conductive interconnects having a known profile, providing a substrate having at least one grating structure formed thereabove, the formed grating structure comprised of a plurality of conductive interconnects having an unknown profile, and illuminating the formed grating structure. The method further comprises measuring light reflected off of the grating structure to generate an optical characteristic trace for the formed grating structure and determining a profile of the gate electrode structures comprising the formed grating structure by correlating the generated optical characteristic trace to an optical characteristic trace from the library.