Abstract: A solid state memory component can include a plurality of bit lines, a source line, and a plurality of non-functional memory pillars. Each non-functional memory pillar is electrically isolated from one or both of the plurality of bit lines and the source line. A solid state memory component can include a plurality of pillars located in a periphery portion of the solid state memory component, and memory cells adjacent to each of the pillars. Associated systems and methods are also disclosed.

Abstract: Solid state memory technology is disclosed. In one example, a solid state memory component can include a plurality of bit lines, a source line, and a plurality of non-functional memory pillars. Each non-functional memory pillar is electrically isolated from one or both of the plurality of bit lines and the source line. In another example, a solid state memory component can include a plurality of pillars located in a periphery portion of the solid state memory component, and memory cells adjacent to each of the pillars. Associated systems and methods are also disclosed.

Abstract: Solid state memory technology is disclosed. A solid state memory component can include a plurality of bit lines, a source line, and a plurality of non-functional memory pillars. Each non-functional memory pillar is electrically isolated from one or both of the plurality of bit lines and the source line. A solid state memory component can include a plurality of pillars located in a periphery portion of the solid state memory component, and memory cells adjacent to each of the pillars. Associated systems and methods are also disclosed.

Abstract: Solid state memory technology is disclosed. In one example, a solid state memory component can include a plurality of bit lines, a source line, and a plurality of non-functional memory pillars. Each non-functional memory pillar is electrically isolated from one or both of the plurality of bit lines and the source line. In another example, a solid state memory component can include a plurality of pillars located in a periphery portion of the solid state memory component, and memory cells adjacent to each of the pillars. Associated systems and methods are also disclosed.

Abstract: A solid state memory component can include a plurality of bit lines, a source line, and a plurality of non-functional memory pillars. Each non-functional memory pillar is electrically isolated from one or both of the plurality of bit lines and the source line. A solid state memory component can also include a plurality of pillars located in a periphery portion of the solid state memory component, and memory cells adjacent to each of the pillars. Associated systems and methods can include or otherwise utilize such solid state memory components.

Abstract: The present invention relates to starch-hydrocolloid complexes, their preparation and their use in foods. The complexes positively impact the foods into which they are incorporated to give longer-lasting and/or more potent satiety, thereby helping energy management. The invention further relates to the reduction of food intake and/or management of weight by increasing such satiety.

Abstract: The present invention relates to starch-hydrocolloid complexes, their preparation and their use in foods. The complexes positively impact the foods into which they are incorporated to give longer-lasting and/or more potent satiety, thereby helping energy management. The invention further relates to the reduction of food intake and/or management of weight by increasing such satiety.