Patents by Inventor Matthew R. Walsh

Matthew R. Walsh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7268429
    Abstract: A technique for manufacturing an electronic assembly uses a mold that has a first mold portion and a second mold portion. The first mold portion includes a plurality of spaced mold pins extending from an inner surface. A cavity of the first and second mold portions provides a mold cavity, when joined. A backplate is also provided that includes a plurality of support pedestals and an integrated heatsink extending from a first side of the backplate. A substrate includes a first side of an integrated circuit (IC) die mounted to a first side of the substrate. The backplate and the substrate are placed within the cavity of the second mold portion and the support pedestals are in contact with the first side of the substrate. The first and second mold portions are joined and the mold pins contact a second surface of the substrate during an overmolding process.
    Type: Grant
    Filed: June 27, 2005
    Date of Patent: September 11, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Scott D. Brandenburg, David A. Laudick, Thomas A. Degenkolb, Matthew R. Walsh, Jeenhuei S. Tsai
  • Patent number: 7202571
    Abstract: An electronic module includes a substrate, at least one surface mounted integrated circuit (IC) component and an underfill material. The substrate includes a plurality of electrically conductive traces, formed on at least one surface of the substrate, and the component is electrically coupled to at least one of the conductive traces. The underfill material is positioned between the component and the substrate and provides at least one pedestal that supports the component during encapsulation. The underfill material, when cured, maintains the integrity of the electrical connections between the component and the conductive traces.
    Type: Grant
    Filed: August 16, 2004
    Date of Patent: April 10, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Brian D. Thompson, Charles I. Delheimer, Derek B. Workman, Jeenhuei S. Tsai, Matthew R. Walsh, Scott D. Brandenburg
  • Patent number: 6999317
    Abstract: A thermally enhanced electronic module includes a thermally conductive case, a self-aligning thermally conductive heat sink and an integrated circuit (IC) package. The case includes an aperture sized for receiving a portion of the heat sink. The IC package includes a first surface and a second surface, opposite the first surface, and is mounted to a substrate with the first surface of the IC package facing the substrate. The second surface of the IC package is in thermal contact with the heat sink, when the heat sink is positioned in the aperture and secured to the case.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: February 14, 2006
    Assignee: Delphi Technologies, Inc.
    Inventors: Suresh K. Chengalva, Gary E. Oberlin, Matthew R. Walsh
  • Patent number: 6943058
    Abstract: A no-flow underfill material and process suitable for underfilling a bumped circuit component. The underfill material initially comprises a dielectric polymer material in which is dispersed a precursor capable of reacting to form an inorganic filler. The underfill process generally entails dispensing the underfill material over terminals on a substrate, and then placing the component on the substrate so that the underfill material is penetrated by the bumps on the component and the bumps contact the terminals on the substrate. The bumps are then reflowed to form solid electrical interconnects that are encapsulated by the resulting underfill layer. The precursor may be reacted to form the inorganic filler either during or after reflow.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: September 13, 2005
    Assignee: Delphi Technologies, Inc.
    Inventors: Arun K. Chaudhuri, Derek B. Workman, Frank Stepniak, Matthew R. Walsh
  • Patent number: 6916684
    Abstract: A process for underfilling a bumped die surface using a lamination step and compound film such that solder bumps on the die are exposed during lamination. The compound film comprises a first layer containing an underfill material and a second layer on the first layer. The underfill material and the second layer comprise polymer materials that differ from each other. The compound film is laminated to the die, preferably at the wafer level, so that the underfill material is forced between the solder bumps and fills spaces between the bumps but does not cover the bumps. In contrast, the second layer covers the solder bumps, but is then selectively removed to re-expose the solder bumps and the underfill material therebetween.
    Type: Grant
    Filed: March 18, 2003
    Date of Patent: July 12, 2005
    Assignee: Delphi Technologies, Inc.
    Inventors: Frank Stepniak, Matthew R. Walsh, Arun K. Chaudhuri, Michael J. Varnau
  • Patent number: 6833628
    Abstract: A package and packaging method that incorporates multiple surface-mounted devices mounted to the package, which in turn can be mounted onto a circuit board. The package generally includes a pair of laminate substrates that together form a chip carrier and input/output (I/O) interface structure for the devices. The devices are mounted to opposite surface of a first of the substrates. The second substrate is attached to the first substrate, and has an interior opening therethrough. The first and second substrates are attached to each other such that devices mounted on one surface of the first substrate are disposed within the interior opening of the second laminate substrate. A mold compound can be applied to underfill and encapsulate the devices mounted to the surfaces of the first substrate.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: December 21, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: Scott D. Brandenburg, Darrel E. Peugh, Matthew R. Walsh
  • Patent number: 6802446
    Abstract: A conductive adhesive material characterized by metallurgical bonds between electrically-conductive particles dispersed in a polymer matrix of the material. The polymer matrix has a fluxing capability when heated to reduce metal oxides on the surfaces of the particles. At least the outer surfaces of the particles are formed of a fusible material, so that sufficiently heating the conductive adhesive material will reduce metal oxides on the particles, and at least partially melt the fusible metal, enabling the particles to metallurgically bond to each other and to metal surfaces contacted by the adhesive material.
    Type: Grant
    Filed: February 1, 2002
    Date of Patent: October 12, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: Arun K. Chaudhuri, Frank Stepniak, Matthew R. Walsh
  • Publication number: 20040185601
    Abstract: A process for underfilling a bumped die surface using a lamination step and compound film such that solder bumps on the die are exposed during lamination. The compound film comprises a first layer containing an underfill material and a second layer on the first layer. The underfill material and the second layer comprise polymer materials that differ from each other. The compound film is laminated to the die, preferably at the wafer level, so that the underfill material is forced between the solder bumps and fills spaces between the bumps but does not cover the bumps. In contrast, the second layer covers the solder bumps, but is then selectively removed to re-expose the solder bumps and the underfill material therebetween.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 23, 2004
    Inventors: Frank Stepniak, Matthew R. Walsh, Arun K. Chaudhuri, Michael J. Varnau
  • Publication number: 20040185602
    Abstract: A no-flow underfill material and process suitable for underfilling a bumped circuit component. The underfill material initially comprises a dielectric polymer material in which is dispersed a precursor capable of reacting to form an inorganic filler. The underfill process generally entails dispensing the underfill material over terminals on a substrate, and then placing the component on the substrate so that the underfill material is penetrated by the bumps on the component and the bumps contact the terminals on the substrate. The bumps are then reflowed to form solid electrical interconnects that are encapsulated by the resulting underfill layer. The precursor may be reacted to form the inorganic filler either during or after reflow.
    Type: Application
    Filed: March 18, 2003
    Publication date: September 23, 2004
    Applicant: DELPHI TECHNOLOGIES, INC.
    Inventors: Arun K. Chaudhuri, Derek B. Workman, Frank Stepniak, Matthew R. Walsh
  • Publication number: 20040113281
    Abstract: A package and packaging method that incorporates multiple surface-mounted devices mounted to the package, which in turn can be mounted onto a circuit board. The package generally includes a pair of laminate substrates that together form a chip carrier and input/output (I/O) interface structure for the devices. The devices are mounted to opposite surfaces of a first of the substrates. The second substrate is attached to the first substrate, and has an interior opening therethrough. The first and second substrates are attached to each other such that devices mounted on one surface of the first substrate are disposed within the interior opening of the second laminate substrate. A mold compound can be applied to underfill and encapsulate the devices mounted to the surfaces of the first substrate.
    Type: Application
    Filed: December 17, 2002
    Publication date: June 17, 2004
    Inventors: Scott D. Brandenburg, Darrel E. Peugh, Matthew R. Walsh
  • Patent number: 6660560
    Abstract: A no-flow underfill material and process for underfilling a flip chip component. The underfill material comprises at least three polymer layers. A first of the layers overlies terminals of a substrate to which the component is to be mounted. The first and second layers are substantially free of fillers, while the third layer contains a filler material to reduce its CTE. The underfill process entails placing the component so that solder terminals thereof penetrate the first, second and third layers and contact the terminals on the substrate. Because only the third layer contains filler material, penetration of the underfill material by the solder terminals is substantially unimpeded. The solder terminals are then reflowed, during which the filler material migrates into the unfilled first layer and the first, second and third layers consolidate and cure to form a single underfill layer.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: December 9, 2003
    Assignee: Delphi Technologies, Inc.
    Inventors: Arun K. Chaudhuri, Derek B. Workman, Matthew R. Walsh
  • Publication number: 20030146266
    Abstract: A conductive adhesive material characterized by metallurgical bonds between electrically-conductive particles dispersed in a polymer matrix of the material. The polymer matrix has a fluxing capability when heated to reduce metal oxides on the surfaces of the particles. At least the outer surfaces of the particles are formed of a fusible material, so that sufficiently heating the conductive adhesive material will reduce metal oxides on the particles, and at least partially melt the fusible metal, enabling the particles to metallurgically bond to each other and to metal surfaces contacted by the adhesive material.
    Type: Application
    Filed: February 1, 2002
    Publication date: August 7, 2003
    Inventors: Arun K. Chaudhuri, Frank Stepniak, Matthew R. Walsh
  • Publication number: 20030049411
    Abstract: A no-flow underfill material and process for underfilling a flip chip component. The underfill material comprises at least three polymer layers. A first of the layers overlies terminals of a substrate to which the component is to be mounted. The first and second layers are substantially free of fillers, while the third layer contains a filler material to reduce its CTE. The underfill process entails placing the component so that solder terminals thereof penetrate the first, second and third layers and contact the terminals on the substrate. Because only the third layer contains filler material, penetration of the underfill material by the solder terminals is substantially unimpeded. The solder terminals are then reflowed, during which the filler material migrates into the unfilled first layer and the first, second and third layers consolidate and cure to form a single underfill layer.
    Type: Application
    Filed: September 10, 2001
    Publication date: March 13, 2003
    Applicant: DELPHI TECHNOLOGIES,INC
    Inventors: Arun K. Chaudhuri, Derek B. Workman, Matthew R. Walsh