Abstract: The present invention provides a method and apparatus for modifying process selectivities based on process state information. The method includes accessing process state information associated with at least one material removal process, determining at least one selectivity based on the process state information, and modifying at least one process parameter of said material removal process based on said at least one determined selectivity.

Abstract: The present invention is generally directed to various advanced process control methodologies for thermal oxidation processes, and various systems for accomplishing same. In one illustrative embodiment, the method comprises measuring an ambient pressure of an environment external to an oxidation chamber, determining a correction factor based upon at least the measured ambient pressure, determining at least one parameter of a thermal oxidation process to be performed in the oxidation chamber based upon the determined correction factor, and performing the thermal oxidation process comprised of the determined parameter on at least one substrate positioned in the oxidation chamber.

Abstract: A method and an apparatus for performing a batch organization of semiconductor wafers. Data relating to metrology data associated with a processed semiconductor wafer in a lot is acquired. A quality characteristic associated with the processed semiconductor wafer is determined based upon the metrology data. A plurality of semiconductor wafers associated with the lot re-organized for subsequent processing, based upon the quality characteristic.

Abstract: In one illustrative embodiment, the method comprises providing a substrate having a process layer formed thereabove, performing a wet etching process comprised of a duration parameter on the process layer to reduce a thickness of the process layer, and adjusting the duration parameter of the wet etching process if the reduced thickness of the process layer after the etching process is complete is not within acceptable limits. In another illustrative embodiment, the present invention is directed to a system that is comprised of an etch tool for performing an etching process for a duration on a process layer formed above a semiconducting substrate to reduce a thickness of the process layer, and a controller for adjusting the duration of the etching process if the reduced thickness of the process layer after the etching process is performed is not within acceptable limits.

Abstract: An apparatus and method are capable of a process to planarize a surface of a conductive layer on a semiconductor wafer. The method includes bringing a temperature of the conductive layer to within a predetermined range below a melting point of the conductive layer and holding the temperature of the conductive layer within the predetermined range to allow the conductive layer to undergo strain via at least one creep mechanism due to a weight of the conductive layer. The conductive layer is then cooled.

Abstract: In one illustrative embodiment, the method comprises performing at least one electrical performance test on an integrated circuit device, determining, based upon data obtained from said at least one electrical performance test, a target thickness for at least one inter-level dielectric layer to be formed above a wafer, and performing a deposition process to form said at least one inter-level dielectric layer to said target thickness. In other embodiments, the method comprises determining a duration of a deposition process to be performed to form the at least one inter-level dielectric layer, and performing the deposition process for the determined duration.