Patents by Inventor Matthew S. Gates
Matthew S. Gates has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12321786Abstract: A process includes determining a first degree of throttling to apply to a polling of hardware devices by a hardware processor based on a historical total utilization of the hardware processor; and determining a second degree of throttling to apply to the polling of hardware devices by the hardware processor based on a historical polling utilization of the hardware processor. The hardware processor includes, responsive to an upcoming hardware device polling cycle for the hardware processor and based on the first degree of throttling and the second degree of throttling, regulating whether the hardware processor bypasses the hardware device polling cycle or executes the hardware device polling cycle.Type: GrantFiled: September 28, 2021Date of Patent: June 3, 2025Assignee: Hewlett Packard Enterprise Development LPInventor: Matthew S. Gates
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Patent number: 12277139Abstract: In some examples, a system maintains, for a base storage structure and a collection of snapshots associated with the base storage structure, statistics relating to usage of storage space based on data of the base storage structure and the collection of snapshots. The system checks metadata of a first snapshot to determine validity of references in the metadata and a presence of any child of the first snapshot or a grandparent of the first snapshot. The system associates, based on the validity of the references in the metadata and the presence of any child or grandparent of the first snapshot, a hint with a metadata entry of a parent of the first snapshot to indicate that a metadata entry of the child or the grandparent is to be checked. The system updates, using the hint, the statistics relating to usage of storage space.Type: GrantFiled: April 27, 2023Date of Patent: April 15, 2025Assignee: Hewlett Packard Enterprise Development LPInventors: Tessa DeMuth, Matthew S. Gates, Monica Jane Kinney, Christopher Robert Nichols
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Publication number: 20240405783Abstract: Example implementations relate to storing data in a storage system. An example includes receiving, by a storage controller of a storage system, a data unit to be stored in persistent storage of the storage system. The storage controller calculates multiple entropy values for the data unit. The storage controller selects, based on the multiple entropy values, at least one reduction operation from multiple different reduction operations. The storage controller performs the selected at least one reduction operation on the received data unit.Type: ApplicationFiled: May 31, 2023Publication date: December 5, 2024Inventors: Robert Michael Lester, Matthew S. Gates, Alex Veprinsky
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Publication number: 20240362249Abstract: In some examples, a system maintains, for a base storage structure and a collection of snapshots associated with the base storage structure, statistics relating to usage of storage space based on data of the base storage structure and the collection of snapshots. The system checks metadata of a first snapshot to determine validity of references in the metadata and a presence of any child of the first snapshot or a grandparent of the first snapshot. The system associates, based on the validity of the references in the metadata and the presence of any child or grandparent of the first snapshot, a hint with a metadata entry of a parent of the first snapshot to indicate that a metadata entry of the child or the grandparent is to be checked. The system updates, using the hint, the statistics relating to usage of storage space.Type: ApplicationFiled: April 27, 2023Publication date: October 31, 2024Inventors: Tessa DeMuth, Matthew S. Gates, Monica Jane Kinney, Christopher Robert Nichols
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Patent number: 12072844Abstract: Example implementations relate to storing data in a storage system. An example includes receiving, by a storage controller of a storage system, a data unit to be stored in persistent storage of the storage system. The storage controller determines maximum and minimum entropy values for the received data unit. The storage controller determines, based on at least the minimum entropy value and the maximum entropy value, whether the received data unit is viable for data reduction. In response to a determination that the received data unit is viable for data reduction, The storage controller performs at least one reduction operation on the received data unit.Type: GrantFiled: July 29, 2022Date of Patent: August 27, 2024Assignee: Hewlett Packard Enterprise Development LPInventors: Robert Michael Lester, Susan Agten, Matthew S. Gates, Alex Veprinsky
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Publication number: 20240037072Abstract: Example implementations relate to storing data in a storage system. An example includes receiving, by a storage controller of a storage system, a data unit to be stored in persistent storage of the storage system. The storage controller determines maximum and minimum entropy values for the received data unit. The storage controller determines, based on at least the minimum entropy value and the maximum entropy value, whether the received data unit is viable for data reduction. In response to a determination that the received data unit is viable for data reduction, The storage controller performs at least one reduction operation on the received data unit.Type: ApplicationFiled: July 29, 2022Publication date: February 1, 2024Inventors: Robert Michael Lester, Susan Agten, Matthew S. Gates, Alex Veprinsky
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Patent number: 11853221Abstract: In some examples, a system dynamically adjusts a prefetching load with respect to a prefetch cache based on a measure of past utilizations of the prefetch cache, wherein the prefetching load is to prefetch data from storage into the prefetch cache.Type: GrantFiled: February 18, 2022Date of Patent: December 26, 2023Assignee: Hewlett Packard Enterprise Development LPInventors: Xiali He, Alex Veprinsky, Matthew S. Gates, William Michael McCormack, Susan Agten
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Publication number: 20230267077Abstract: In some examples, a system dynamically adjusts a prefetching load with respect to a prefetch cache based on a measure of past utilizations of the prefetch cache, wherein the prefetching load is to prefetch data from storage into the prefetch cache.Type: ApplicationFiled: February 18, 2022Publication date: August 24, 2023Inventors: Xiali He, Alex Veprinsky, Matthew S. Gates, William Michael McCormack, Susan Agten
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Patent number: 11698816Abstract: Systems and methods are provided for lock-free thread scheduling. Threads may be placed in a ring buffer shared by all computer processing units (CPUs), e.g., in a node. A thread assigned to a CPU may be placed in the CPU's local run queue. However, when a CPU's local run queue is cleared, that CPU checks the shared ring buffer to determine if any threads are waiting to run on that CPU, and if so, the CPU pulls a batch of threads related to that ready-to-run thread to execute. If not, an idle CPU randomly selects another CPU to steal threads from, and the idle CPU attempts to dequeue a thread batch associated with the CPU from the shared ring buffer. Polling may be handled through the use of a shared poller array to dynamically distribute polling across multiple CPUs.Type: GrantFiled: August 31, 2020Date of Patent: July 11, 2023Assignee: Hewlett Packard Enterprise Development LPInventors: Matthew S. Gates, Joel E. Lilienkamp, Alex Veprinsky, Susan Agten
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Patent number: 11630603Abstract: A process includes, responsive to a first epoch of a sequence of epochs, a plurality of processors accessing first entries of a first buffer that is shared among the plurality of processors. The first entries identify a first subset of hardware devices to be polled of a plurality of hardware devices. Responsive to the accessing, the plurality of processors poll the first subset of hardware devices. Responsive to the first epoch, the process includes, responsive to results of the polling, the plurality of processors updating delay orders that are associated with the first subset of hardware devices; and the plurality of processors adding second entries identifying the first subset of hardware devices to a plurality of second buffers based on the delay orders, where each second buffer of the plurality of second buffers corresponds to a different delay order of the delay orders.Type: GrantFiled: September 28, 2021Date of Patent: April 18, 2023Assignee: Hewlett Packard Enterprise Development LPInventor: Matthew S. Gates
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Publication number: 20230094430Abstract: A process includes determining a first degree of throttling to apply to a polling of hardware devices by a hardware processor based on a historical total utilization of the hardware processor; and determining a second degree of throttling to apply to the polling of hardware devices by the hardware processor based on a historical polling utilization of the hardware processor. The hardware processor includes, responsive to an upcoming hardware device polling cycle for the hardware processor and based on the first degree of throttling and the second degree of throttling, regulating whether the hardware processor bypasses the hardware device polling cycle or executes the hardware device polling cycle.Type: ApplicationFiled: September 28, 2021Publication date: March 30, 2023Inventor: Matthew S. Gates
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Publication number: 20230101611Abstract: A process includes, responsive to a first epoch of a sequence of epochs, a plurality of processors accessing first entries of a first buffer that is shared among the plurality of processors. The first entries identify a first subset of hardware devices to be polled of a plurality of hardware devices. Responsive to the accessing, the plurality of processors poll the first subset of hardware devices. Responsive to the first epoch, the process includes, responsive to results of the polling, the plurality of processors updating delay orders that are associated with the first subset of hardware devices; and the plurality of processors adding second entries identifying the first subset of hardware devices to a plurality of second buffers based on the delay orders, where each second buffer of the plurality of second buffers corresponds to a different delay order of the delay orders.Type: ApplicationFiled: September 28, 2021Publication date: March 30, 2023Inventor: Matthew S. Gates
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Publication number: 20220374310Abstract: In some examples, a system receives a write request from a requester to write first data to a storage system that implements redundancy in which redundancy information is stored for data in the storage system. The system initiates the write to the storage system. The system determines that partial hardening for the first data has been achieved based on detecting that an information portion has been written to the storage system for the write request, the information portion being less than an entirety of the first data and the first parity information. In response to the determining of the partial hardening, the system notifies the requester of completion of the write request.Type: ApplicationFiled: May 18, 2021Publication date: November 24, 2022Inventors: Alex Veprinsky, Matthew S. Gates, Lee L. Nelson
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Publication number: 20100268689Abstract: At least one simulated snapshot is created for a parent volume stored on a storage subsystem. A processor updates the at least one simulated snapshot in response to modification operations to the parent volume, wherein the at least one simulated snapshot stores metadata but not any prior version of data that is modified in response to the modification operations to the parent volume. The processor provides information relating to usage of the at least one simulated snapshot based on accessing the metadata of the at least one simulated snapshot.Type: ApplicationFiled: April 15, 2009Publication date: October 21, 2010Inventors: Matthew S. Gates, Bradley G. Culter, Donald C. Milos