Patents by Inventor Matthew S. Reuter

Matthew S. Reuter has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11954022
    Abstract: Provided are a storage device, system, and method for throttling host writes in a host buffer to a storage device. The storage device is coupled to a host system having a host buffer that includes reads and writes to pages of the storage device. Garbage collection consolidates valid data from pages in the storage device to fewer pages. A determination is made as to whether a processing measurement at the storage device satisfies a threshold. A timer value is set to a positive value in response to determining that the processing measurement satisfies the threshold. The timer is started to run for the timer value. Writes from the host buffer are blocked while the timer is running. Writes remain in the host buffer while the timer is running. A write is accepted from the host buffer to process in response to expiration of the timer.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: April 9, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew S. Reuter, Timothy J. Fisher, Aaron Daniel Fry, Jenny L. Brown, John Carrington Cates, Austin Eberle
  • Patent number: 11816046
    Abstract: A computer-implemented method, according to one embodiment, includes: receiving, in first and second read request buffers corresponding to first and second computer interface links of a data storage system, read requests. Read completion data corresponding to the read requests being performed is also received. The read completion data is allocated between first and second read completion buffers based on which of the read completion buffers has a greater amount of available space therein. Furthermore, the read completion data in the first and second read completion buffers is sent. The first read completion buffer corresponds to the first computer interface link and the second read completion buffer corresponds to the second computer interface link.
    Type: Grant
    Filed: February 25, 2022
    Date of Patent: November 14, 2023
    Assignee: International Business Machines Corporation
    Inventors: Adalberto Guillermo Yanes, Matthew S. Reuter, Timothy Fisher
  • Publication number: 20230281120
    Abstract: Provided are a storage device, system, and method for throttling host writes in a host buffer to a storage device. The storage device is coupled to a host system having a host buffer that includes reads and writes to pages of the storage device. Garbage collection consolidates valid data from pages in the storage device to fewer pages. A determination is made as to whether a processing measurement at the storage device satisfies a threshold. A timer value is set to a positive value in response to determining that the processing measurement satisfies the threshold. The timer is started to run for the timer value. Writes from the host buffer are blocked while the timer is running. Writes remain in the host buffer while the timer is running. A write is accepted from the host buffer to process in response to expiration of the timer.
    Type: Application
    Filed: March 2, 2022
    Publication date: September 7, 2023
    Inventors: Matthew S. REUTER, Timothy J. FISHER, Aaron Daniel FRY, Jenny L. BROWN, John Carrington CATES, Austin EBERLE
  • Publication number: 20230273886
    Abstract: A computer-implemented method, according to one embodiment, includes: receiving, in first and second read request buffers corresponding to first and second computer interface links of a data storage system, read requests. Read completion data corresponding to the read requests being performed is also received. The read completion data is allocated between first and second read completion buffers based on which of the read completion buffers has a greater amount of available space therein. Furthermore, the read completion data in the first and second read completion buffers is sent. The first read completion buffer corresponds to the first computer interface link and the second read completion buffer corresponds to the second computer interface link.
    Type: Application
    Filed: February 25, 2022
    Publication date: August 31, 2023
    Inventors: Adalberto Guillermo Yanes, Matthew S. Reuter, Timothy Fisher
  • Patent number: 10614903
    Abstract: A computer-implemented method includes receiving probability distribution function (PDF) data corresponding to bit-error-rate (BER) data for each of a plurality of data blocks within a qualified set of NVRAMS, collecting non-exhaustive bit-error-rate data for each of the data blocks on a tested NVRAM to produce non-exhaustive test data for each of the data blocks, determining a plurality of stable data blocks on the tested NVRAM based on the non-exhaustive test data and the probability distribution function data for each of the data blocks, determining, from the non-exhaustive test data, an inferior data block for the stable data blocks on the tested NVRAM, collecting exhaustive bit-error-rate data on the inferior data block to produce exhaustive test data for the tested NVRAM, and routing the tested NVRAM according to the exhaustive test data. A corresponding computer program product and computer system are also disclosed herein.
    Type: Grant
    Filed: July 18, 2016
    Date of Patent: April 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: Jeffrey W. Christensen, Phillip E. Christensen, Robert S. Miller, Matthew S. Reuter, Antoine G. Sater
  • Publication number: 20180019022
    Abstract: A computer-implemented method includes receiving probability distribution function (PDF) data corresponding to bit-error-rate (BER) data for each of a plurality of data blocks within a qualified set of NVRAMS, collecting non-exhaustive bit-error-rate data for each of the data blocks on a tested NVRAM to produce non-exhaustive test data for each of the data blocks, determining a plurality of stable data blocks on the tested NVRAM based on the non-exhaustive test data and the probability distribution function data for each of the data blocks, determining, from the non-exhaustive test data, an inferior data block for the stable data blocks on the tested NVRAM, collecting exhaustive bit-error-rate data on the inferior data block to produce exhaustive test data for the tested NVRAM, and routing the tested NVRAM according to the exhaustive test data. A corresponding computer program product and computer system are also disclosed herein.
    Type: Application
    Filed: July 18, 2016
    Publication date: January 18, 2018
    Inventors: Jeffrey W. Christensen, Phillip E. Christensen, Robert S. Miller, Matthew S. Reuter, Antoine G. Sater