Abstract: With an increasing demand for miniature low power sensors, there is a need to integrate optoelectronic devices with CMOS technology. Deposition of GaAs nanowires on polycrystalline conductive films allows for direct integration of optoelectronic devices on dissimilar materials. Nanowire growth is demonstrated on oxide and metallic films. Introducing dopant elements modifies the surface energy improving nanowire morphology and lowing for core-shell growth. Electrical measurements confirm that the metal-semiconductor junction is Ohmic and thus the feasibility of integrating nanowire-based devices directly on CMOS devices.

Abstract: Methods of metal assisted chemical etching III-V semiconductors are provided. The methods can include providing an electrically conductive film pattern disposed on a semiconductor substrate comprising a III-V semiconductor. At least a portion of the III-V semiconductor immediately below the conductive film pattern may be selectively removed by immersing the electrically conductive film pattern and the semiconductor substrate into an etchant solution comprising an acid and an oxidizing agent having an oxidation potential less than an oxidation potential of hydrogen peroxide. Such methods can form high aspect ratio semiconductor nanostructures.

Abstract: Methods of metal assisted chemical etching III-V semiconductors are provided. The methods can include providing an electrically conductive film pattern disposed on a semiconductor substrate comprising a III-V semiconductor. At least a portion of the III-V semiconductor immediately below the conductive film pattern may be selectively removed by immersing the electrically conductive film pattern and the semiconductor substrate into an etchant solution comprising an acid and an oxidizing agent having an oxidation potential less than an oxidation potential of hydrogen peroxide. Such methods can form high aspect ratio semiconductor nanostructures.

Abstract: Methods of metal assisted chemical etching III-V semiconductors are provided. The methods can include providing an electrically conductive film pattern disposed on a semiconductor substrate comprising a III-V semiconductor. At least a portion of the III-V semiconductor immediately below the conductive film pattern may be selectively removed by immersing the electrically conductive film pattern and the semiconductor substrate into an etchant solution comprising an acid and an oxidizing agent having an oxidation potential less than an oxidation potential of hydrogen peroxide. Such methods can form high aspect ratio semiconductor nanostructures.