Abstract: A computer system is disclosed that includes a memory, a memory defect map, and a shift encoder. The memory includes a plurality of bits and a plurality of input/output ports for accessing the plurality of bits. The memory defect map specifies positions of defective ones of the plurality of bits. The shift encoder encodes positions of defective ones of the plurality of bits in a shift encoding. The shift encoding includes a shift redundancy record representing positions of transitions between functional bits and defective bits in the memory, and a hints record representing numbers of bits in sets of consecutive defective bits in the memory.