Abstract: A method for global data flow optimization for machine learning (ML) programs. The method includes receiving, by a storage device, an initial plan for an ML program. A processor builds a nested global data flow graph representation using the initial plan. Operator directed acyclic graphs (DAGs) are connected using crossblock operators according to inter-block data dependencies. The initial plan for the ML program is re-written resulting in an optimized plan for the ML program with respect to its global data flow properties. The re-writing includes re-writes of: configuration dataflow properties, operator selection and structural changes.

Abstract: A pressure sensor device includes a semiconductor die of the pressure sensor device and a bond wire of the pressure sensor device. A maximal vertical distance between a part of the bond wire and the semiconductor die is larger than a minimal vertical distance between the semiconductor die and a surface of a gel covering the semiconductor die.

Abstract: Parallel execution of machine learning programs is provided. Program code is received. The program code contains at least one parallel for statement having a plurality of iterations. A parallel execution plan is determined for the program code. According to the parallel execution plan, the plurality of iterations is partitioned into a plurality of tasks. Each task comprises at least one iteration. The iterations of each task are independent. Data required by the plurality of tasks is determined. An access pattern by the plurality of tasks of the data is determined. The data is partitioned based on the access pattern.

Abstract: A method for optimization of machine learning (ML) workloads on a graphics processor unit (GPU). The method includes identifying a computation having a generic pattern commonly observed in ML processes. Hierarchical aggregation spanning a memory hierarchy of the GPU for processing is performed for the identified computation including maintaining partial output vector results in shared memory of the GPU. Hierarchical aggregation for vectors is performed including performing intra-block aggregation for multiple thread blocks of a partial output vector results on GPU global memory.

Abstract: One embodiment provides a method for runtime piggybacking of concurrent data-parallel jobs in task-parallel machine learning (ML) programs including intercepting, by a processor, executable jobs including executable map reduce (MR) jobs and looped jobs in a job stream. The processor queues the executable jobs, and applies runtime piggybacking of multiple jobs by processing workers of different types. Runtime piggybacking for a ParFOR (parallel for) ML program is optimized including configuring the runtime piggybacking based on processing worker type, degree of parallelism and minimum time thresholds.

Abstract: A pressure sensor module including a housing, a pressure sensor chip, and one or more of an integrated passive device (IDP) chip and discrete passive devices are disclosed. The pressure sensor chip and one or more of the IPD chip and the discrete passive devices are arranged within the housing.

Abstract: A clamping assembly includes a configuration of mechanically clamped components disposed one on top of the other to form a stack. A clamping device generates a mechanical compressive force on the configuration of the components and a pressure element transmits the mechanical compressive force from the clamping device to the configuration. The pressure element contains a metal foam for a planar, homogeneous transmission of the compressive force. A sub module of a converter having at least one series circuit of power semiconductor switching units implemented as the clamping apparatus is also provided.

Abstract: One embodiment provides a method for runtime piggybacking of concurrent data-parallel jobs in task-parallel machine learning (ML) programs including intercepting, by a processor, executable jobs including executable map reduce (MR) jobs and looped jobs in a job stream. The processor queues the executable jobs, and applies runtime piggybacking of multiple jobs by processing workers of different types. Runtime piggybacking for a ParFOR (parallel for) ML program is optimized including configuring the runtime piggybacking based on processing worker type, degree of parallelism and minimum time thresholds.

Abstract: A pressure sensor module including a housing, a pressure sensor chip, and one or more of an integrated passive device (IDP) chip and discrete passive devices are disclosed. The pressure sensor chip and one or more of the IPD chip and the discrete passive devices are arranged within the housing.

Abstract: A method for optimization of machine learning (ML) workloads on a graphics processor unit (GPU). The method includes identifying a computation having a generic pattern commonly observed in ML processes. Hierarchical aggregation spanning a memory hierarchy of the GPU for processing is performed for the identified computation including maintaining partial output vector results in shared memory of the GPU. Hierarchical aggregation for vectors is performed including performing intra-block aggregation for multiple thread blocks of a partial output vector results on GPU global memory.

Abstract: A method for optimization of machine learning (ML) workloads on a graphics processor unit (GPU). The method includes identifying a computation having a generic pattern commonly observed in ML processes. An optimized fused GPU kernel is employed to exploit temporal locality for inherent data-flow dependencies in the identified computation. Hierarchical aggregation spanning a memory hierarchy of the GPU for processing for the identified computation is performed. GPU kernel launch parameters are estimated following an analytical model that maximizes thread occupancy and minimizes atomic writes to GPU global memory.

Abstract: The embodiments described herein relate to recompiling an execution plan of a machine-learning program during runtime. An execution plan of a machine-learning program is compiled. In response to identifying a directed acyclic graph of high-level operations (HOP DAG) for recompilation during runtime, the execution plan is dynamically recompiled. The dynamic recompilation includes updating statistics and dynamically rewriting one or more operators of the identified HOP DAG, recomputing memory estimates of operators of the rewritten HOP DAG based on the updated statistics and rewritten operators, constructing a directed acyclic graph of low-level operations (LOP DAG) corresponding to the rewritten HOP DAG based in part on the recomputed memory estimates, and generating runtime instructions based on the LOP DAG.

Abstract: An electrical fuse configuration or arrangement includes two contact pieces which are placed on top of each other and between which a metal foam is located. A method for interrupting an electric current by using the electrical fuse configuration includes melting the metal foam at a current value exceeding a predetermined threshold or maximum current value.

Abstract: The embodiments described herein relate to recompiling an execution plan of a machine-learning program during runtime. An execution plan of a machine-learning program is compiled. In response to identifying a directed acyclic graph of high-level operations (HOP DAG) for recompilation during runtime, the execution plan is dynamically recompiled. The dynamic recompilation includes updating statistics and dynamically rewriting one or more operators of the identified HOP DAG, recomputing memory estimates of operators of the rewritten HOP DAG based on the updated statistics and rewritten operators, constructing a directed acyclic graph of low-level operations (LOP DAG) corresponding to the rewritten HOP DAG based in part on the recomputed memory estimates, and generating runtime instructions based on the LOP DAG.

Abstract: The embodiments described herein relate to recompiling an execution plan of a machine-learning program during runtime. An execution plan of a machine-learning program is compiled. In response to identifying a directed acyclic graph of high-level operations (HOP DAG) for recompilation during runtime, the execution plan is dynamically recompiled. The dynamic recompilation includes updating statistics and dynamically rewriting one or more operators of the identified HOP DAG, recomputing memory estimates of operators of the rewritten HOP DAG based on the updated statistics and rewritten operators, constructing a directed acyclic graph of low-level operations (LOP DAG) corresponding to the rewritten HOP DAG based in part on the recomputed memory estimates, and generating runtime instructions based on the LOP DAG.

Abstract: In a method for analyzing a large data set using a statistical computing environment language operation, a processor generates code from the statistical computing environment language operation that can be understood by a software system for processing machine learning algorithms in a MapReduce environment. A processor transfers the code to the software system for processing machine learning algorithms in a MapReduce environment. A processor invokes execution of the code with the software system for processing machine learning algorithms in a MapReduce environment.

Abstract: A clamping assembly includes a configuration of mechanically clamped components disposed one on top of the other to form a stack. A clamping device generates a mechanical compressive force on the configuration of the components and a pressure element transmits the mechanical compressive force from the clamping device to the configuration. The pressure element contains a metal foam for a planar, homogeneous transmission of the compressive force. A sub module of a converter having at least one series circuit of power semiconductor switching units implemented as the clamping apparatus is also provided.

Abstract: A method for global data flow optimization for machine learning (ML) programs. The method includes receiving, by a storage device, an initial plan for an ML program. A processor builds a nested global data flow graph representation using the initial plan. Operator directed acyclic graphs (DAGs) are connected using crossblock operators according to inter-block data dependencies. The initial plan for the ML program is re-written resulting in an optimized plan for the ML program with respect to its global data flow properties. The re-writing includes re-writes of: configuration dataflow properties, operator selection and structural changes.

Abstract: A clamping assembly includes a configuration of mechanically clamped components that lie on top of one another to form a stack, a spring system and a clamping device for generating a mechanical compressive force onto the configuration of the components. The spring system is a spring plate formed by a multiplicity of plate spring elements that are disposed adjacent each other and are connected to each other. A sub-module of a converter includes at least one series circuit of power semiconductor switching units and an energy storage device connected in parallel therewith, in which the series circuit of the power semiconductor switching units is provided as the clamping device.

Abstract: An electrical component includes a conductor having a plurality of conductor sections. The conductor sections are electrically short-circuited. The short circuit is at least partially eliminated when the temperature of the component exceeds a threshold or limit value. An electrical circuit including the component and a method for increasing the inductance of an electrical component having a conductor, are also provided.