Patents by Inventor Matthias Bussmann

Matthias Bussmann has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8261173
    Abstract: One embodiment of the invention features a programmable gain stage in analog update circuitry to overcome the accuracy limitation of the circuit gain and the maintenance of small finite number of possible sequence estimates.
    Type: Grant
    Filed: April 29, 2009
    Date of Patent: September 4, 2012
    Assignee: Menara Networks, Inc.
    Inventors: Matthias Bussmann, Salam Elahmadi
  • Patent number: 8085079
    Abstract: According to one embodiment of the invention, a summing circuit comprises a first transmitter, a second transmitter, a first current offset circuit and a first transconductance amplifier. The first current offset circuit is coupled to the emitters of the first and second transistors. The first transconductance amplifier is coupled to the first current offset circuit.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: December 27, 2011
    Assignee: Menara Networks
    Inventors: Kelvin Tran, Matthias Bussmann, Lloyd Linder, Salam Elahmadi, Harry Tan
  • Patent number: 7990185
    Abstract: According to one embodiment of the invention, a programmable finite impulse response (FIR) filter is implemented with differential isolation circuits to isolate parasitic capacitance from attenuating an output signal at both first and second differential output terminals of the FIR filter. The FIR includes a track and hold circuit and a summing circuit that provides operational advantages to the FIR filter.
    Type: Grant
    Filed: May 12, 2008
    Date of Patent: August 2, 2011
    Assignee: Menara Networks
    Inventors: Kelvin Tran, Matthias Bussmann, Lloyd Linder, Salam Elahmadi, Harry Tan
  • Patent number: 7852152
    Abstract: According to one embodiment of the invention, a circuit comprising a plurality of operational transconductance amplifiers (OTAS) is described. The first OTA has differential input and differential output. The second OTA also has differential input, where a first output of the first OTA is coupled to the first differential input of the second OTA, which is an inverting input. A second output of the first OTA is coupled to the second input of the second OTA, which is a non-inverting input. The first differential output being coupled to a first input of the first OTA and the second differential output being coupled to a second input of the first OTA for negative feedback and current biasing.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: December 14, 2010
    Assignee: Menara Networks
    Inventors: Dalius Baranauskas, Denis Zelenin, Matthias Bussmann, Salam Elahmadi
  • Publication number: 20100281348
    Abstract: One embodiment of the invention features a programmable gain stage in analog update circuitry to overcome the accuracy limitation of the circuit gain and the maintenance of small finite number of possible sequence estimates.
    Type: Application
    Filed: April 29, 2009
    Publication date: November 4, 2010
    Inventors: Matthias Bussmann, Salam Elahmadi
  • Publication number: 20100271107
    Abstract: According to one embodiment of the invention, a programmable finite impulse response (FIR) filter is implemented with differential isolation circuits to isolate parasitic capacitance from attenuating an output signal at both a first and second differential output terminals of the FIR filter. The FIR includes a summing circuit that provides operational advantages to the FIR filter.
    Type: Application
    Filed: July 8, 2010
    Publication date: October 28, 2010
    Inventors: Kelvin Tran, Matthias Bussmann, Lloyd Linder, Salam Elahmadi, Harry Tan
  • Publication number: 20100052778
    Abstract: According to one embodiment of the invention, a circuit comprising a plurality of operational transconductance amplifiers (OTAS) is described. The first OTA has differential input and differential output. The second OTA also has differential input, where a first output of the first OTA is coupled to the first differential input of the second OTA, which is an inverting input. A second output of the first OTA is coupled to the second input of the second OTA, which is a non-inverting input. The first differential output being coupled to a first input of the first OTA and the second differential output being coupled to a second input of the first OTA for negative feedback and current biasing.
    Type: Application
    Filed: August 28, 2008
    Publication date: March 4, 2010
    Inventors: Dalius Baranauskas, Denis Zelenin, Matthias Bussmann, Salam Elahmadi
  • Publication number: 20090279893
    Abstract: According to one embodiment of the invention, a programmable finite impulse response (FIR) filter is implemented with differential isolation circuits to isolate parasitic capacitance from attenuating an output signal at both a first and second differential output terminals of the FIR filter. The FIR includes a track and hold circuit and a summing circuit that provides operational advantages to the FIR filter.
    Type: Application
    Filed: May 12, 2008
    Publication date: November 12, 2009
    Inventors: Kelvin Tran, Matthias Bussmann, Lloyd Linder, Salam Elahmadi, Harry Tan