Patents by Inventor Matthias Grewe

Matthias Grewe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170213783
    Abstract: A semiconductor package is disclosed. The semiconductor package includes an electrically conducting carrier having a mounting surface, a first level first semiconductor power device having a first load electrode mounted over the mounting surface of the electrically conducting carrier and having a second load electrode opposite the first electrode. The package further includes a first level second semiconductor power device. A first connection element has a first surface connected to the second load electrode of the first level first semiconductor power device. A second connection element has a first surface connected to the second load electrode of the first level second semiconductor power device. The package includes a second level first semiconductor power device and a second level second semiconductor power device.
    Type: Application
    Filed: January 25, 2017
    Publication date: July 27, 2017
    Applicant: Infineon Technologies AG
    Inventors: Andreas Meiser, Matthias Grewe, Stefan Macheiner
  • Patent number: 7178073
    Abstract: A method for testing an electronic module having a memory cell device includes writing an information item to the memory cell device at a first clock frequency and then reading-out the information item from the memory cell device at a second clock frequency. The read out information item is reflected at a reflection point and is written back to the memory cell device at the second clock frequency. The reflected information unit is then read-out from the memory cell device with the first clock frequency.
    Type: Grant
    Filed: March 14, 2003
    Date of Patent: February 13, 2007
    Assignee: Infineon Technologies AG
    Inventors: Stefan Dietrich, Matthias Grewe, Peter Mayer, Armin Rettenberger
  • Patent number: 6870787
    Abstract: In a configuration for checking an address generator, a memory apparatus is configured such that it can store values of address signals that are present on lines of an address bus. The stored values can then be output to at least one access point where the values are provided for further evaluation.
    Type: Grant
    Filed: July 16, 2003
    Date of Patent: March 22, 2005
    Assignee: Infineon Technologies AG
    Inventors: Markus Rohleder, Jörg Weller, Peter Mayer, Matthias Grewe
  • Publication number: 20040080994
    Abstract: In a configuration for checking an address generator, a memory apparatus is configured such that it can store values of address signals that are present on lines of an address bus. The stored values can then be output to at least one access point where the values are provided for further evaluation.
    Type: Application
    Filed: July 16, 2003
    Publication date: April 29, 2004
    Inventors: Markus Rohleder, Jorg Weller, Peter Mayer, Matthias Grewe
  • Publication number: 20030177418
    Abstract: A method for testing an electronic module having a memory cell device includes writing an information item to the memory cell device at a first clock frequency and then reading-out the information item from the memory cell device at a second clock frequency. The read out information item is reflected at a reflection point and is written back to the memory cell device at the second clock frequency. The reflected information unit is then read-out from the memory cell device wiht the first clock frequency.
    Type: Application
    Filed: March 14, 2003
    Publication date: September 18, 2003
    Inventors: Stefan Dietrich, Matthias Grewe, Peter Mayer, Armin Rettenberger