Abstract: A mechanism is provided for secure PIN management of a user trusted device. A user trusted device detects a memory card coupled to the user trusted device. The user trusted device receives user input of an external PIN (ext_PIN). The user trusted device identifies a key (K) associated with the external PIN, wherein the key is stored in the persistent memory. The user trusted device computes a card PIN (card_PIN) using a function (f) and the key as stored on the persistent memory, wherein the card PIN is computed using the following equation: card_PIN=f(K, ext_PIN). The user trusted device unlocks the memory card using the card PIN, thereby forming an unlocked memory card.

Abstract: A mechanism is provided for secure PIN management of a user trusted device. A user trusted device detects a memory card coupled to the user trusted device. The user trusted device receives user input of an external PIN (ext_PIN). The user trusted device identifies a key (K) associated with the external PIN, wherein the key is stored in the persistent memory. The user trusted device computes a card PIN (card_PIN) using a function (f) and the key as stored on the persistent memory, wherein the card PIN is computed using the following equation: card_PIN=f(K, ext_PIN). The user trusted device unlocks the memory card using the card PIN, thereby forming an unlocked memory card.

Abstract: The invention is directed to a data-processing system comprising a processor, a second encrypted cryptographic key stored in a first persistent memory, and a cryptographic co-processor that comprises a first register and a second register. The cryptographic co-processor serves for decrypting in a decryption step the second encrypted cryptographic key, thereby generating therefrom a second unencrypted cryptographic key that is usable by the processor for executing an operation. For the decryption step the first register is loadable with the second encrypted cryptographic key and the second register is loadable with a first cryptographic key. The resulting second unencrypted cryptographic key is maintainable in one of the registers for being used by the cryptographic co-processor for decrypting encrypted information or encrypting unencrypted information for the operation.

Abstract: The invention is directed to a data-processing system comprising a processor, a second encrypted cryptographic key stored in a first persistent memory, and a cryptographic co-processor that comprises a first register and a second register. The cryptographic co-processor serves for decrypting in a decryption step the second encrypted cryptographic key, thereby generating therefrom a second unencrypted cryptographic key that is usable by the processor for executing an operation. For the decryption step the first register is loadable with the second encrypted cryptographic key and the second register is loadable with a first cryptographic key. The resulting second unencrypted cryptographic key is maintainable in one of the registers for being used by the cryptographic co-processor for decrypting encrypted information or encrypting unencrypted information for the operation.

Abstract: The present invention concerns a method and an apparatus for the synchronization and the scheduling of multiple data streams and real time tasks. In accordance with the present invention, pointers pointing to the information streams to be synchronized and processed are kept in the table (51) of a selector (11). The time marks (S1Start etc.) of said information streams are stored in a table (61) of a timer. The system time is checked against said time marks and if a time mark has been reached, the table (51) of said selector (11) is updated. If the status of an information stream is such that its trigger condition is fulfilled, the pointer to said information stream is made available at the output of the selector (11). This pointer is then used to retrieve the respective information stream and to forward it to a playout device.

Abstract: The present application concerns a method and an apparatus, in a communication network, for processing the various fields of a protocol header preceding a data stream to provide a unique connection identifier for processing the data stream. All relevant protocol information is extracted from the protocol header for look up in a Content-Addressable Memory (CAM) (80). Each time an entry in the CAM (80) matches protocol information applied to the CAM's input (84), the CAM address of this storage section, i.e. the address of a row of the CAM (80), is provided at the output (82) thereof. The CAM addresses obtained from the protocol header are concatenated by means of a Connection Number Builder (CNB, 95) resulting in a unique connection identifier provided at the Protocol Filter's output (96) to be used for the processing of the data stream.