Patents by Inventor Matthias Schaller

Matthias Schaller has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8925396
    Abstract: During the fabrication of microstructure devices, such as integrated circuits, particles may be analyzed by displacing or removing the particles from the device surface and subsequently performing an analysis process. Consequently, a well-defined measurement environment may be established after removal of the particles, which may be accomplished on the basis of nanoprobes and the like. Hence, even critical surface areas may be monitored with respect to contamination and the like on the basis of well-established analysis techniques.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: January 6, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Petra Hetzer, Matthias Schaller, Dmytro Chumakov
  • Patent number: 8888947
    Abstract: By controlling the flow rate of one or more gaseous components of an etch ambient during the formation of metal lines and vias on the basis of feedback measurement data from critical dimensions, process variations may be reduced, thereby enhancing performance and reliability of the respective metallization structure.
    Type: Grant
    Filed: March 5, 2010
    Date of Patent: November 18, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Matthias Schaller, Uwe Schulze, Mathias Baranyai
  • Patent number: 8835245
    Abstract: When forming sophisticated semiconductor devices, a replacement gate approach may be applied in combination with a self-aligned contact regime by forming the self-aligned contacts prior to replacing the placeholder material of the gate electrode structures.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: September 16, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Peter Baars, Till Schloesser, Frank Jakubowski, Andy Wei, Richard Carter, Matthias Schaller
  • Patent number: 8658494
    Abstract: Contact elements of sophisticated semiconductor devices may be formed for gate electrode structures and for drain and source regions in separate process sequences in order to apply electroless plating techniques without causing undue overfill of one type of contact opening. Consequently, superior process uniformity in combination with a reduced overall contact resistance may be accomplished. In some illustrative embodiments, cobalt may be used as a contact metal without any additional conductive barrier materials.
    Type: Grant
    Filed: August 11, 2010
    Date of Patent: February 25, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Kai Frohberg, Juergen Boemmels, Matthias Schaller, Sven Mueller
  • Patent number: 8575041
    Abstract: Damaged surface areas of low-k dielectric materials may be efficiently repaired by avoiding the saturation of dangling silicon bonds after a reactive plasma treatment on the basis of OH groups, as is typically applied in conventional process strategies. The saturation of the dangling bond may be accomplished by directly initiating a chemical reaction with appropriate organic species, thereby providing superior reaction conditions, which in turn results in a more efficient restoration of the dielectric characteristics.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: November 5, 2013
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Matthias Schaller, Daniel Fischer, Thomas Oszinda
  • Patent number: 8440579
    Abstract: Patterning-induced damage of sensitive low-k dielectric materials in semiconductors devices may be restored to a certain degree on the basis of a surface treatment that is performed prior to exposing the device to ambient atmosphere. To this end, the dangling silicon bonds of the silicon oxide-based low-k dielectric material may be saturated in a confined process environment, thereby providing superior surface conditions for the subsequent application of an appropriate repair chemistry.
    Type: Grant
    Filed: July 8, 2011
    Date of Patent: May 14, 2013
    Assignee: Globalfoundries Inc.
    Inventors: Matthias Schaller, Daniel Fischer, Thomas Oszinda
  • Patent number: 8435885
    Abstract: Analysis of chemical and physical characteristics of polymer species and etch residues caused in critical plasma-assisted etch processes for patterning material layers in semiconductor devices may be accomplished by removing at least a portion of these species on the basis of a probing material layer, which may be lifted-off from the patterned surface. The probing material layer may substantially suppress a chemical modification of the species of interest and may thus allow the examination of the initial status of these species.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: May 7, 2013
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Dmytro Chumakov, Petra Hetzer, Matthias Schaller
  • Patent number: 8423320
    Abstract: By using powerful data analysis techniques, such as PCR, PLS, CLS and the like, in combination with measurement techniques providing structural information, gradually varying material characteristics may be determined during semiconductor fabrication, thereby also enabling the monitoring of complex manufacturing sequences. For instance, the material characteristics of sensitive dielectric materials, such as ULK material, may be detected, for instance with respect to an extension of a damage zone, in order to monitor the quality of metallization systems of sophisticated semiconductor devices. The inline measurement data may be obtained on the basis of infrared spectroscopy, for instance using FTIR and the like, which may even allow directly obtaining the measurement data at process chambers, substantially without affecting the overall process throughput.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: April 16, 2013
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Matthias Schaller, Thomas Oszinda, Christin Bartsch, Daniel Fischer
  • Publication number: 20130072018
    Abstract: Damaged surface areas of low-k dielectric materials may be efficiently repaired by avoiding the saturation of dangling silicon bonds after a reactive plasma treatment on the basis of OH groups, as is typically applied in conventional process strategies. The saturation of the dangling bond may be accomplished by directly initiating a chemical reaction with appropriate organic species, thereby providing superior reaction conditions, which in turn results in a more efficient restoration of the dielectric characteristics.
    Type: Application
    Filed: September 15, 2011
    Publication date: March 21, 2013
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Matthias Schaller, Daniel Fischer, Thomas Oszinda
  • Patent number: 8399358
    Abstract: Silicon oxide based low-k dielectric materials may receive superior hydrophobic surface characteristics on the basis of a plasma treatment using hydrogen and carbon containing radicals. For this purpose, the surface of the low-k dielectric material may be exposed to these radicals, at least in one in situ process in combination with another reactive plasma ambient, for instance used for patterning the low-k dielectric material. Consequently, superior surface characteristics may be established or re-established without significantly contributing to product cycle time.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: March 19, 2013
    Assignee: GLOBALFOUNDRIES, Inc.
    Inventors: Daniel Fischer, Matthias Schaller
  • Patent number: 8338293
    Abstract: During the patterning of via openings in sophisticated metallization systems of semiconductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.
    Type: Grant
    Filed: May 17, 2011
    Date of Patent: December 25, 2012
    Assignee: Advanced Micro Devies, Inc.
    Inventors: Christin Bartsch, Daniel Fischer, Matthias Schaller
  • Publication number: 20120211837
    Abstract: When forming sophisticated semiconductor devices, a replacement gate approach may be applied in combination with a self-aligned contact regime by forming the self-aligned contacts prior to replacing the placeholder material of the gate electrode structures.
    Type: Application
    Filed: February 14, 2012
    Publication date: August 23, 2012
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Peter Baars, Till Schloesser, Frank Jakubowski, Andy Wei, Richard Carter, Matthias Schaller
  • Publication number: 20120049383
    Abstract: Patterning-induced damage of sensitive low-k dielectric materials in semiconductors devices may be restored to a certain degree on the basis of a surface treatment that is performed prior to exposing the device to ambient atmosphere. To this end, the dangling silicon bonds of the silicon oxide-based low-k dielectric material may be saturated in a confined process environment, thereby providing superior surface conditions for the subsequent application of an appropriate repair chemistry.
    Type: Application
    Filed: July 8, 2011
    Publication date: March 1, 2012
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Matthias Schaller, Daniel Fischer, Thomas Oszinda
  • Publication number: 20120052601
    Abstract: Analysis of chemical and physical characteristics of polymer species and etch residues caused in critical plasma-assisted etch processes for patterning material layers in semiconductor devices may be accomplished by removing at least a portion of these species on the basis of a probing material layer, which may be lifted-off from the patterned surface. The probing material layer may substantially suppress a chemical modification of the species of interest and may thus allow the examination of the initial status of these species.
    Type: Application
    Filed: July 11, 2011
    Publication date: March 1, 2012
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Dmytro Chumakov, Petra Hetzer, Matthias Schaller
  • Patent number: 8110498
    Abstract: When forming sophisticated metallization systems, surface integrity of an exposed metal surface, such as a copper-containing surface, may be enhanced by exposing the surface to a vapor of a passivation agent. Due to the corresponding interaction with the metal surface, enhanced integrity may be accomplished, while at the same time damage of exposed dielectric surface portions may be significantly reduced compared to conventional aggressive wet chemical cleaning processes that are typically used in conventional patterning regimes.
    Type: Grant
    Filed: September 9, 2009
    Date of Patent: February 7, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Matthias Schaller, Daniel Fischer, Susanne Leppack
  • Patent number: 8101524
    Abstract: During the formation of a metal line in a low-k dielectric material, an upper portion of a trench formed in a capping layer and the low-k dielectric material is treated to provide enlarged tapering or corner rounding, thereby significantly improving the fill capabilities of subsequent metal deposition processes. In one particular embodiment, an additional etch process is performed after etching through the capping layer and the low-k dielectric layer and after resist removal.
    Type: Grant
    Filed: May 5, 2005
    Date of Patent: January 24, 2012
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Kai Frohberg, Matthias Schaller, Massud Aminpur
  • Publication number: 20120003832
    Abstract: During the patterning of via openings in sophisticated metallization systems of semiconductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.
    Type: Application
    Filed: May 17, 2011
    Publication date: January 5, 2012
    Inventors: Christin Bartsch, Daniel Fischer, Matthias Schaller
  • Patent number: 8062982
    Abstract: A high yield plasma etch process for an interlayer dielectric layer of a semiconductor device is provided, according to an embodiment of which a dielectric layer is etched with a nitrogen-containing plasma. In this way, the formation of polymers on a backside bevel of a substrate is avoided or substantially reduced. Remaining polymer at the backside bevel can be removed in situ by post-etch treatment. Further, a plasma etching device is provided comprising a chamber, a substrate receiving space for receiving a substrate, a plasma generator for generating a plasma in the chamber and a temperature conditioner for conditioning a temperature at an outer circumferential region of the substrate receiving space and thereby minimizing temperature gradients at a bevel of the wafer.
    Type: Grant
    Filed: October 5, 2007
    Date of Patent: November 22, 2011
    Assignee: Advanced Micro Devices, Inc
    Inventors: Daniel Fischer, Matthias Schaller, Matthias Lehr, Kornelia Dittmar
  • Patent number: 7986040
    Abstract: During the patterning of via openings in sophisticated metallization systems of semi-conductor devices, the opening may extend through a conductive cap layer and an appropriate ion bombardment may be established to redistribute material of the underlying metal region to exposed sidewall portions of the conductive cap layer, thereby establishing a protective material. Consequently, in a subsequent wet chemical etch process, the probability for undue material removal of the conductive cap layer may be greatly reduced.
    Type: Grant
    Filed: March 4, 2009
    Date of Patent: July 26, 2011
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christin Bartsch, Daniel Fischer, Matthias Schaller
  • Publication number: 20110049713
    Abstract: Contact elements of sophisticated semiconductor devices may be formed for gate electrode structures and for drain and source regions in separate process sequences in order to apply electroless plating techniques without causing undue overfill of one type of contact opening. Consequently, superior process uniformity in combination with a reduced overall contact resistance may be accomplished. In some illustrative embodiments, cobalt may be used as a contact metal without any additional conductive barrier materials.
    Type: Application
    Filed: August 11, 2010
    Publication date: March 3, 2011
    Inventors: Kai Frohberg, Juergen Boemmels, Matthias Schaller, Sven Mueller