Abstract: A parasitic capacitance mitigation circuit for a relaxation oscillator. The parasitic capacitance mitigation circuit includes a first switch coupled across a parasitic capacitance of a resistive sensing element and a second switch coupled between the parasitic capacitance and a reference voltage node. The parasitic capacitance mitigation circuit includes a pulse generator configured to: monitor a voltage across the parasitic capacitance; detect a voltage transient across the parasitic capacitance; and generate a pulse control signal in response to detecting the voltage transient. In response to the pulse control signal, the first switch opens and the second switch closes to discharge the parasitic capacitance through the second switch.

Abstract: A sensor interface for a resistive sensor has an analog front end comprising. The analog front end has an analog input/output (I/O) sensor port to be coupled to the resistive sensor. An integration stage is coupled to the analog I/O sensor port to oscillate at an oscillation frequency proportional to a sensor resistance of the resistive sensor. The integration stage has a variable integrator capacitance to vary the oscillation frequency. A gain stage is coupled to the integration stage and has a variable gain to vary the oscillation frequency of the integration stage. The sensor interface also has a smart digital controller (SDC) coupled to the analog front end to compute the sensor resistance of the resistive sensor based on the oscillation frequency. In addition, the SDC automatically detects unstable oscillation in the integration stage and causes the variable gain and the variable integrator capacitance to change.

Abstract: A sensor interface for a resistive sensor has an analog front end comprising. The analog front end has an analog input/output (I/O) sensor port to be coupled to the resistive sensor. An integration stage is coupled to the analog I/O sensor port to oscillate at an oscillation frequency proportional to a sensor resistance of the resistive sensor. The integration stage has a variable integrator capacitance to vary the oscillation frequency. A gain stage is coupled to the integration stage and has a variable gain to vary the oscillation frequency of the integration stage. The sensor interface also has a smart digital controller (SDC) coupled to the analog front end to compute the sensor resistance of the resistive sensor based on the oscillation frequency. In addition, the SDC automatically detects unstable oscillation in the integration stage and causes the variable gain and the variable integrator capacitance to change.