Patents by Inventor Matthieu Deloge

Matthieu Deloge has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Over voltage protection circuit
    Patent number: 9979183
    Abstract: An overvoltage protection circuit is disclosed. The overvoltage protection circuit includes an input voltage port, an output voltage port, a low pass filter coupled to the input voltage port and a voltage regulator coupled to the low pass filter. The overvoltage protection circuit also includes a transistor having a gate, a drain and a source. The transistor is coupled to the input voltage port and the output voltage port and the gate is coupled to the voltage regulator.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: May 22, 2018
    Assignee: NXP B.V.
    Inventors: Jaume Tornila Oliver, Arnoud Pieter van der Wel, Matthieu Deloge
  • OVER VOLTAGE PROTECTION CIRCUIT
    Publication number: 20170033556
    Abstract: An overvoltage protection circuit is disclosed. The overvoltage protection circuit includes an input voltage port, an output voltage port, a low pass filter coupled to the input voltage port and a voltage regulator coupled to the low pass filter. The overvoltage protection circuit also includes a transistor having a gate, a drain and a source. The transistor is coupled to the input voltage port and the output voltage port and the gate is coupled to the voltage regulator.
    Type: Application
    Filed: July 27, 2015
    Publication date: February 2, 2017
    Inventors: Jaume Tornila Oliver, Arnoud Pieter Van der Wel, Matthieu Deloge
  • Communication apparatus with slew rate feedback
    Patent number: 9355056
    Abstract: In accordance with one or more example aspects of the disclosure, communications are effected on a bus using bit time and slew rate feedback. As consistent with one or more embodiments, communications are effected in a network including a master circuit and a plurality of slave circuits, on bus that is controlled by the master circuit corresponding to master and slave data communication. A feedback signal is provided, which is indicative of a slew rate and bit time of signals communicated between the master and slave circuits on the bus. Data is transmitted on the bus by generating output signals via a waveform corresponding to an input signal, and controlling the waveform based upon the slew rate and bit time indicated via the feedback signal.
    Type: Grant
    Filed: June 21, 2013
    Date of Patent: May 31, 2016
    Assignee: NXP B.V.
    Inventors: Matthieu Deloge, Arnoud Pieter van der Wel
  • COMMUNICATION APPARATUS WITH FEEDBACK
    Publication number: 20140375359
    Abstract: In accordance with one or more example aspects of the disclosure, communications are effected on a bus using bit time and slew rate feedback. As consistent with one or more embodiments, communications are effected in a network including a master circuit and a plurality of slave circuits, on bus that is controlled by the master circuit corresponding to master and slave data communication. A feedback signal is provided, which is indicative of a slew rate and bit time of signals communicated between the master and slave circuits on the bus. Data is transmitted on the bus by generating output signals via a waveform corresponding to an input signal, and controlling the waveform based upon the slew rate and bit time indicated via the feedback signal.
    Type: Application
    Filed: June 21, 2013
    Publication date: December 25, 2014
    Inventors: Matthieu Deloge, Arnoud Pieter van der Wel