Patents by Inventor Matthijs D. Pardoen

Matthijs D. Pardoen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7190933
    Abstract: Disclosed is a circuit and method for automatic tuning of a resonant circuit in a transceiver having a receiver and a transmitter that includes a power amplifier for driving the resonant circuit. During a transmit mode of the transceiver, a resonance voltage of the resonant circuit is compared to an input voltage signal to the power amplifier to determine an error signal that is converted into a control word. The control word drives an adjustable capacitance bank that is part of the resonant circuit. During a receive mode of the transceiver, the control word value is held constant to substantially maintain resonance of the resonant circuit during operation of the receiver.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: March 13, 2007
    Assignee: Intergration Associates Inc.
    Inventors: Hendricus De Ruijter, Gábor Tóth, Péter Onódy, András Hegyi, Attila Zólomy, Matthijs D. Pardoen, János Erdélyi, Ferenc Mernyei
  • Patent number: 7139391
    Abstract: A hook switch circuit is shown wherein two high-voltage bipolar transistors, a PNP transistor Q1 and a NPN transistor Q2. that are connected in a regenerative feedback manner to form a bi-stable latch. The regenerative structure permits the use of low beta transistors that may be turned on with a low control current, but still conduct a sufficient off-hook current. Also shown is a polarity steering regenerative switch (MP1, MP2) that provides a power supply voltage from a telephone line pair and may be adapted for a polarity signal and can be combined with a current mirror (MP7) to produce a current signal proportional to the line voltage (LV1).
    Type: Grant
    Filed: February 12, 2004
    Date of Patent: November 21, 2006
    Assignee: Integration Associates, Inc.
    Inventors: Wayne T. Holcombe, Matthijs D. Pardoen
  • Patent number: 7058372
    Abstract: Disclosed is a circuit and method for continuous automatic tuning of a resonant circuit. A resonance voltage of the resonant circuit is phase shifted by a predetermined phase shift ? degrees and an input voltage signal to a power amplifier driving the resonant circuit is phase shifted by ?±90 degrees to place the signals in quadrature. The phase shifted signals are mixed to obtain a error signal. The error signal is compared to a predetermined voltage range in order to generate control signals for a control word generator, such as an up-down counter. The control word generator produces a control word that drives a capacitance bank that is part of the resonant circuit. The present invention continuously automatically adjusts the capacitance of the capacitance bank to tune the resonant circuit.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: June 6, 2006
    Assignee: Integration Associates Inc.
    Inventors: Matthijs D. Pardoen, János Erdélyi, Attila Zólomy, Ferenc Mernyei
  • Patent number: 7031458
    Abstract: The present invention is directed toward a method and apparatus for transferring data across an isolation barrier using high speed analog encoded signals. A line side circuit interfaces with tip and ring contacts on one side of a capacitive isolation barrier that isolates the line side circuit from a modem side circuit. During an on-hook state, the line side circuit converts an analog line side voltage signal to a frequency signal and then encodes the frequency signal into a high frequency pulse-width-modulated (PWM) signal. The high frequency PWM signal is transmitted across the capacitive isolation barrier to the modem side circuit. During an off-hook state, the analog line side voltage is again encoded into a high frequency pulse-width-modulated (PWM) signal for transmission across the isolation barrier. The modem side circuit recovers the transmitted PWM signal and converts it into a digital count value that represents the amplitude of the analog voltage observed at the tip and ring.
    Type: Grant
    Filed: October 30, 2001
    Date of Patent: April 18, 2006
    Assignee: Integration Associates Inc.
    Inventors: Wayne T. Holcombe, Matthijs D. Pardoen
  • Publication number: 20040174986
    Abstract: A hook switch circuit is shown wherein two high-voltage bipolar transistors, a PNP transistor Q1 and a NPN transistor Q2. that are connected in a regenerative feedback manner to form a bi-stable latch. The regenerative structure permits the use of low beta transistors that may be turned on with a low control current, but still conduct a sufficient off-hook current. Also shown is a polarity steering regenerative switch (MP1, MP2) that provides a power supply voltage from a telephone line pair and may be adapted for a polarity signal and can be combined with a current mirror (MP7) to produce a current signal proportional to the line voltage (LV1).
    Type: Application
    Filed: February 12, 2004
    Publication date: September 9, 2004
    Applicant: Integration Associates Inc.
    Inventors: Wayne T. Holcombe, Matthijs D. Pardoen
  • Publication number: 20040147281
    Abstract: Transmitter and receiver circuits are shown that are capable of operating in a stand-alone mode without the necessity of an external controller to program the transmitter and receiver circuits, such as by providing operating parameters through a control interface. An internal controller of the transmitter detects that no external controller is present and operates to access an external storage device, such as an EEPROM, to obtain data for configuring at least some of the operating characteristics of the transmitter. The transmitter may be configured to respond to predetermined events by accessing corresponding data at predetermined addresses of the EEPROM. The internal controller of the receiver may also detect that no external controller is present and to obtain data for configuring at least some of the operating characteristics of the receiver.
    Type: Application
    Filed: November 12, 2003
    Publication date: July 29, 2004
    Applicant: Integration Associates Inc.
    Inventors: Wayne T. Holcombe, Andras Hegyi, Tibor Keller, Vince A. Horvath, Matthijs D. Pardoen, Janos Erdelyi
  • Patent number: 6628489
    Abstract: A circuit and method are shown for battery reversal protection. The circuit includes a first transistor that buffers a bulk terminal of a protected transistor from an input terminal for receiving a power supply voltage. A second transistor is coupled to both the input terminal of the circuit and an output terminal of the circuit and detects when the power supply voltage falls below an output voltage at the output terminal and, responsive thereto, switches off the first transistor to isolate the bulk terminal of the protected transistor from the input terminal. Another aspect of the invention provides current reversal protection using a third transistor that also detects when the power supply voltage falls below an output voltage at the output terminal and, responsive thereto, conducts current from the output terminal to the gate terminal of the protected transistor.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: September 30, 2003
    Assignee: Integration Associates Inc.
    Inventors: Matthijs D. Pardoen, Wayne T. Holcombe
  • Patent number: 6583609
    Abstract: One aspect of the present invention detects an equivalent series resistance (ESR) of an external capacitor and adjusts a transfer function of a feedback loop of the voltage regulator to compensate for the ESR. The ESR is detected by measuring a phase shift in a ripple voltage signal of an output voltage of the voltage regulator. Based upon the measured phase shift, an adjustable capacitance is introduced to the feedback loop to compensate for the ESR by introducing a zero to the transfer function to stabilize the voltage regulator circuit. Another aspect of the present invention is to adjust the transfer function of the feedback loop to improve transient response. By measuring both the phase shift and the amplitude of the ripple voltage signal, a gain and the position of a pole in the transfer function of the feedback loop may be adjusted to improve the transient response.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: June 24, 2003
    Assignee: Integration Associates Inc.
    Inventor: Matthijs D. Pardoen
  • Publication number: 20030091183
    Abstract: The present invention is directed toward a method and apparatus for transferring data across an isolation barrier using high speed analog encoded signals. A line side circuit interfaces with tip and ring contacts on one side of a capacitive isolation barrier that isolates the line side circuit from a modem side circuit. During an on-hook state, the line side circuit converts an analog line side voltage signal to a frequency signal and then encodes the frequency signal into a high frequency pulse-width-modulated (PWM) signal. The high frequency PWM signal is transmitted across the capacitive isolation barrier to the modem side circuit. During an off-hook state, the analog line side voltage is again encoded into a high frequency pulse-width-modulated (PWM) signal for transmission across the isolation barrier. The modem side circuit recovers the transmitted PWM signal and converts it into a digital count value that represents the amplitude of the analog voltage observed at the tip and ring.
    Type: Application
    Filed: October 30, 2001
    Publication date: May 15, 2003
    Applicant: INTEGRATION ASSOCIATES INC.
    Inventors: Wayne T. Holcombe, Matthijs D. Pardoen
  • Patent number: 6559623
    Abstract: A method and circuit are shown for controlling an in-rush current to a voltage regulator circuit. A sense transistor is coupled in parallel with a pass transistor of the voltage regulator circuit and used to monitor the current through the pass transistor. A sense current through the sense transistor is converted to a voltage signal and input to an amplifier along with a ramping voltage signal generated in response to a circuit activation signal. An output of the amplifier drives a control gate of a current source that sources current to gate terminals of both the pass transistor and the sense transistor. A limiting circuit also monitors the sense current and sinks current from the control terminal of the current source in order to limit a maximum current through the pass transistor.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: May 6, 2003
    Assignee: Integration Associates Inc.
    Inventor: Matthijs D. Pardoen
  • Patent number: 5635876
    Abstract: The correction circuit comprises a first quadrature phase comparator intended to receive as input two signals which are desired to be in quadrature and to have equal amplitudes. Phase adjustment means are firstly intended to correct the phase of at least one of the signal to re-establish a phase difference of 90.degree. therebetween. The correction circuit further comprises means to effectuate the sum and the difference of the signals which it receives as input and to supply the sum and the difference to a second quadrature phase comparator intended to supply as output a second error signal representative of the difference of the effective phase shift of these calculated signals and 90.degree.. The second error signal is finally supplied to amplitude adjustment means intended to correct the amplitude of at least one of said signals.
    Type: Grant
    Filed: September 30, 1994
    Date of Patent: June 3, 1997
    Assignee: ETA SA Fabriques d'Ebauches
    Inventors: John F. M. Gerrits, Matthijs D. Pardoen
  • Patent number: 5483695
    Abstract: An FM receiver comprising a local oscillator (23), a heterodyning stage (24) and a demodulator stage (33). The heterodyning stage has a signal producing arrangement and a multiplier arrangement. The signal producing arrangement (25,26,27,29,30,31,32) produces n signals a.sub.1 . . . a.sub.n wherein each signal consists of a message signal modulated at the intermediate frequency of the receiver, and these signals a.sub.1 . . . a.sub.n are related by the expressiona.sub.i =cos [.omega..sub.IF t+k.sub.f .intg..sup.t A(t)*dt+.OMEGA.+.pi.*(.sup.i /n)]where .omega..sub.IF, k.sub.f and .OMEGA. are constants, n is a positive integer greater than or equal to 2 and i takes the values of all positive integers up to and including n. The multiplier arrangement (28) multiplies the n signals together and thus produces an output signal from the heterodyning stage, wherein the message signal is modulated at a frequency of n times the intermediate frequency.
    Type: Grant
    Filed: April 13, 1994
    Date of Patent: January 9, 1996
    Assignee: CSEM Centre Suisse D'Electronique et de Microtechnique
    Inventor: Matthijs D. Pardoen
  • Patent number: 5382924
    Abstract: A modulator is adapted for use in a transmitter of an information transmission signal in which the information is in the form of a frequency shift keyed code. The signal is centered on a fictional carrier frequency fc, on either side of which are emitted two actual frequencies separated from the frequency fc by .DELTA.f, according to whether the binary information has a high value (+1) or a low value (-1). A first generator (1) creates carrier signals in the form of sin(2.pi.f.sub.c t) and cos(2.pi.f.sub.c t). A second generator (6) creates, as a function of the information, modulation signals of the form sin(2.pi..DELTA.ft) and cos(2.pi..DELTA.ft) which are mixed with the carrier signals. At each transition of the information, first phase shifting means (8,14) modify by k.pi. the phase of one of the modulation signals.
    Type: Grant
    Filed: October 1, 1993
    Date of Patent: January 17, 1995
    Assignee: CSEM Centre Suisse d'Electronique et de Microtechnique SA
    Inventors: Matthijs D. Pardoen, John F. M. Gerrits