Abstract: A power converter arrangement includes a semiconductor switch system with a controllable switch. A capacitor unit includes a capacitor having a capacitance value, the capacitor unit being operatively connected to the semiconductor switch system. A conductor arrangement includes a conductor adapted to conduct an electric current between the capacitor unit and the semiconductor switch system. The conductor has a resistance and an inductance. A resonant circuit is formed by the resistance, the inductance and the capacitance, and the power converter arrangement includes at least one attenuating element for attenuating an electrical ringing in the resonant circuit. The attenuating element is conductively isolated from the resonant circuit. The attenuating element includes ferromagnetic material, and the attenuating element is magnetically coupled to the conductor such that variations in the electric current intensity of the conductor induces eddy currents within the attenuating element.

Abstract: A power converter arrangement including a semiconductor switch system including at least one controllable switch, a capacitor unit including at least one capacitor having a capacitance value, the capacitor unit being operatively connected to the semiconductor switch system, a conductor arrangement including of at least one conductor adapted to conduct an electric current between the capacitor unit and the semiconductor switch system, wherein the at least one conductor having a resistance and an inductance, and wherein a resonant circuit is formed by the resistance, the inductance and the capacitance, and wherein the power converter arrangement includes at least one attenuating element for attenuating an electrical ringing in the resonant circuit, wherein the at least one attenuating element is conductively isolated from the resonant circuit, and wherein the at least one attenuating element includes ferromagnetic material, and wherein the at least one attenuating element is magnetically coupled to the at least

Abstract: A method and apparatus are provided for balancing currents of two or more parallel-connected power semiconductor switches during an on-state of the switches. A control terminal of each switch is driven by a driver unit. The method includes determining ratios between the currents through the switches. For each switch, the method includes controlling the voltage at the control terminal on the basis of the ratios by controlling a level of a supply voltage of the driver unit of the switch, and after a turn-on commutation transient, modulating the output of the driver unit. The duty cycle of the modulation is controlled to minimize the time required for the transition of the voltage at the control terminal from the one voltage level to another.

Abstract: A current conductor structure with a frequency-dependent resistance. The current conductor structure comprises a first current conductor and a second current conductor connected in parallel. The first and second current conductor are configured such that the second current conductor has a higher resistance and a lower inductance than the first conductor so that, above a set frequency limit, the resistance component of a total impedance of the current conductor structure is larger than the resistance component of the impedance of the first conductor current.

Abstract: A method and apparatus are provided for balancing currents of two or more parallel-connected power semiconductor switches during an on-state of the switches. A control terminal of each switch is driven by a driver unit. The method includes determining ratios between the currents through the switches. For each switch, the method includes controlling the voltage at the control terminal on the basis of the ratios by controlling a level of a supply voltage of the driver unit of the switch, and after a turn-on commutation transient, modulating the output of the driver unit. The duty cycle of the modulation is controlled to minimize the time required for the transition of the voltage at the control terminal from the one voltage level to another.

Abstract: A method and apparatus are provided for a power semiconductor switch. A current through the switch is responsive to a control terminal voltage at a control terminal of the switch, and the control terminal voltage is driven by a driver unit. The method includes measuring or estimating the current based on a bond voltage of the switch, detecting a short circuit by comparing the measured or estimated current to a short circuit current limit, controlling an on-state voltage level of the control terminal voltage based on the comparison to limit the current through the switch during the short circuit, and controlling the control terminal voltage to an off-state voltage level to turn the switch off. The on-state voltage level voltage is controlled by pulse-width modulating the output of the driver unit. A switching frequency of the modulation is at least the cut-off frequency of low-pass characteristics of the control terminal.

Abstract: An exemplary gate drive circuit and method are disclosed for controlling a gate-controlled component, the gate drive circuit having a PI controller adapted to receive an input reference signal and to control a gate voltage of the gate-controlled component. The gate drive circuit can include a first feedback loop for the PI controller, the first feedback loop having a first gain (kv), a second feedback loop for the PI controller, the second feedback loop having a second gain (ki), and a clipping circuit adapted to modify a feedback signal in the second feedback loop during turn-on of the gate-controlled component when the time derivative of the collector current is negative. The first feedback loop can include a first blanking circuit adapted to cut the feedback loop when the gate-controlled component is in a blocking state.

Abstract: An exemplary apparatus and method for using intelligent gate driver units with distributed intelligence to control antiparallel power modules or parallel-connected electrical switching devices like IGBTs is disclosed. The intelligent gate drive units use the intelligence to balance the currents of the switching devices, even in dynamic switching events. The intelligent gate driver units can use master-slave or daisy chain control structures and instantaneous or time integral differences of the currents of parallel-connected switching devices as control parameters. Instead of balancing the currents, temperature can also be balanced with the intelligent gate driver units.

Abstract: An exemplary gate drive circuit and method are disclosed for controlling a gate-controlled component, the gate drive circuit having a PI controller adapted to receive an input reference signal and to control a gate voltage of the gate-controlled component. The gate drive circuit can include a first feedback loop for the PI controller, the first feedback loop having a first gain (kv), a second feedback loop for the PI controller, the second feedback loop having a second gain (ki), and a clipping circuit adapted to modify a feedback signal in the second feedback loop during turn-on of the gate-controlled component when the time derivative of the collector current is negative. The first feedback loop can include a first blanking circuit adapted to cut the feedback loop when the gate-controlled component is in a blocking state.

Abstract: Exemplary embodiments are directed to a gate drive circuit and a method for controlling a gate-controlled component. The gate drive circuit includes a PI controller that receives an input reference signal (vref,d/dt) controls a gate voltage of the gate-controlled component. The gate drive circuit also includes a first feedback loop for the PI controller adapted to provide feedback from a time derivative of a collector-to-emitter voltage (vCE) of the controlled component. The first feedback loop has a first gain (kv). A second is provided in the gate drive circuit feedback loop for the PI controller that provides feedback from the time derivative of the collector current (iC) of the controlled component. The second feedback loop has second gain (ki) and includes a clipping circuit that modifies the feedback signal in the second feedback loop during turn-on of the controlled component when the time derivative of the collector current is negative.

Abstract: A method is disclosed for controlling a semiconductor component which includes a voltage controlled gate. The method includes determining and storing, prior to use of the semiconductor component, reference values of a gate voltage to be given to the gate of the semiconductor component during a change of operating states. The method also includes providing a pulse width modulated voltage from a driver circuit to a resistor connected to the gate of the semiconductor component according to the stored reference values of the gate voltage when a change in operating states of the semiconductor component is desired.

Abstract: An exemplary apparatus and method for using intelligent gate driver units with distributed intelligence to control antiparallel power modules or parallel-connected electrical switching devices like IGBTs is disclosed. The intelligent gate drive units use the intelligence to balance the currents of the switching devices, even in dynamic switching events. The intelligent gate driver units can use master-slave or daisy chain control structures and instantaneous or time integral differences of the currents of parallel-connected switching devices as control parameters. Instead of balancing the currents, temperature can also be balanced with the intelligent gate driver units.

Abstract: An exemplary apparatus and method for using intelligent gate driver units with distributed intelligence to control antiparallel power modules or parallel-connected electrical switching devices like IGBTs is disclosed. The intelligent gate drive units use the intelligence to balance the currents of the switching devices, even in dynamic switching events. The intelligent gate driver units can use master-slave or daisy chain control structures and instantaneous or time integral differences of the currents of parallel-connected switching devices as control parameters. Instead of balancing the currents, temperature can also be balanced with the intelligent gate driver units.

Abstract: An exemplary method and a control circuit are disclosed for controlling a power semiconductor component by producing a control signal (Ucin) for controlling the component, forming a second control signal (Ucout) in the potential of the controlled component from the control signal (Ucin), measuring a current flowing through the component, and comparing the measured current with a set limit. A fault signal (Ufault) having a logical state is provided on the basis of the comparison between the measured current and the set limit, producing a component control signal (Uave) from the fault signal (Ufault) and the second control signal (Ucout). If a fault is indicated, the component control signal has a value between high and low states, and otherwise the state of the component control signal (Uave) equals the state of the second control signal (Ucout).

Abstract: A method and an arrangement of measuring inverter current, where the inverter is connected to and supplied by a DC intermediate circuit having two or more parallel capacitor branches connected between the positive and negative rail of the DC intermediate circuit, and the capacitance of the capacitor branches being known. The method comprises the steps of measuring the current of one of the parallel capacitor branches, and determining from the measured current the magnitude of the inverter current.

Abstract: This disclosure relates to a cooling structure for an electronic device including an inlet for conveying a flow in a first flow direction towards a first component and an outlet for conveying the flow further. To deter dirt particles from proceeding to electronic components, the cooling structure can include a second flow channel, which starts from a port oriented transversely to the first flow direction or away therefrom and receives part of the flow from the inlet, and which conveys the part of the flow to an electronic component located in the second flow channel.

Abstract: An exemplary method and a control circuit are disclosed for controlling a power semiconductor component by producing a control signal (Ucin) for controlling the component, forming a second control signal (Ucout) in the potential of the controlled component from the control signal (Ucin), measuring a current flowing through the component, and comparing the measured current with a set limit. A fault signal (Ufault) having a logical state is provided on the basis of the comparison between the measured current and the set limit, producing a component control signal (Uave) from the fault signal (Ufault) and the second control signal (Ucout). If a fault is indicated, the component control signal has a value between high and low states, and otherwise the state of the component control signal (Uave) equals the state of the second control signal (Ucout).

Abstract: In a method for detaching a web threading tail from a moving surface in a fiber web machine, the web threading tail (12) is detached from a moving surface (23) by means of air that flows from a blow-off blow channel (19) included in a blade holder (14). A trailing blow (26) is directed to the web threading tail (12) using air that flows from a trailing blow channel (17) included in the blade holder (14). The blade holder (14) includes a flow surface (32), and the trailing blow (26) is blown to the same direction with or in a small angle relative to the flow surface (32). The invention also relates to a corresponding blade holder and a doctor apparatus for detaching a web threading tail from a moving surface in a fiber web machine.

Abstract: An exemplary apparatus and method for using intelligent gate driver units with distributed intelligence to control antiparallel power modules or parallel-connected electrical switching devices like IGBTs is disclosed. The intelligent gate drive units use the intelligence to balance the currents of the switching devices, even in dynamic switching events. The intelligent gate driver units can use master-slave or daisy chain control structures and instantaneous or time integral differences of the currents of parallel-connected switching devices as control parameters. Instead of balancing the currents, temperature can also be balanced with the intelligent gate driver units.

Abstract: A circuit for controlling a thyristor (V1) into conducting state, the thyristor (V1) being in a rectifier, which rectifier is adapted to supply DC voltage to a DC voltage circuit. The circuit comprises a pulse transformer (T1), means for generating voltage pulses on the primary winding of the pulse transformer (T1), a trigger capacitor (C2) adapted to be charged from the voltage pulses in the secondary winding of the pulse transformer, a zener diode (V5) adapted to be triggered with the voltage of the trigger capacitor (C2) when the voltage of the trigger capacitor (C2) exceeds the breakdown voltage of the zener diode (V5), and an auxiliary thyristor (V3) adapted to be triggered with the current from the trigger capacitor (C2) flowing via the zener diode (V5), wherein the cathode of the auxiliary thyristor (V3) is connected to the gate of the thyristor (V1) for triggering the thyristor (V1) with the current from the trigger capacitor (C2) flowing via the auxiliary thyristor (V3).