Patents by Inventor Matti Mantysalo
Matti Mantysalo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10856410Abstract: A stretchable structure comprises or is configured to receive a conductive path and an interface region. The interface region comprises a peripheral line comprising at least one inwardly curved portion, such as an “inverted teardrop” or a fjord like recess pointing essentially towards the center area of the interface region. The interface region is arranged to receive said stretchable conductive path via said inwardly curved portion of said peripheral line of said interface region. In this way the interface region minimizes strains or other twisting or stretching forces directed to the conductor entering into the opening of the inwardly curved portion of the interface region.Type: GrantFiled: September 25, 2017Date of Patent: December 1, 2020Assignee: Tampere University Foundation srInventors: Pekka Iso-Ketola, Jukka Vanhala, Matti Mäntysalo
-
Publication number: 20190394875Abstract: A stretchable structure comprises or is configured to receive a conductive path and an interface region. The interface region comprises a peripheral line comprising at least one inwardly curved portion, such as an “inverted teardrop” or a fjord like recess pointing essentially towards the center area of the interface region. The interface region is arranged to receive said stretchable conductive path via said inwardly curved portion of said peripheral line of said interface region. In this way the interface region minimizes strains or other twisting or stretching forces directed to the conductor entering into the opening of the inwardly curved portion of the interface region.Type: ApplicationFiled: September 25, 2017Publication date: December 26, 2019Applicant: TAMPEREEN KORKEAKOULUSÄÄTIÖ SRInventors: Pekka ISO-KETOLA, Jukka VANHALA, Matti MÄNTYSALO
-
Patent number: 10322927Abstract: A device and method utilizes interconnecting layers separated by an insulating layer. A layered structure comprises a first and a second layer of electrically conductive material, and a third layer of electrically insulating material between them. A via trench is fabricated that extends from the second layer through the third layer into the first layer, a surface on the first layer of electrically conductive material forming a bottom surface of the via trench. An ink-jetting set-up for a mixture of liquid carrier and nanoparticles of conductive material is formed, and a specific process period is determined. Capillary flow of nanoparticles to peripheral edges of an ink-jetted blob of said mixture is induced. The mixture is ink-jetted into a blob on the via trench; the layered structure is heated to evaporate the liquid carrier. The interconnection element is higher at a certain point than between opposing side walls.Type: GrantFiled: April 16, 2018Date of Patent: June 18, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Heikki Kuisma, Matti Mantysalo
-
Publication number: 20180230002Abstract: A device and method utilizes interconnecting layers separated by an insulating layer. A layered structure comprises a first and a second layer of electrically conductive material, and a third layer of electrically insulating material between them. A via trench is fabricated that extends from the second layer through the third layer into the first layer, a surface on the first layer of electrically conductive material forming a bottom surface of the via trench. An ink-jetting set-up for a mixture of liquid carrier and nanoparticles of conductive material is formed, and a specific process period is determined. Capillary flow of nanoparticles to peripheral edges of an ink-jetted blob of said mixture is induced. The mixture is ink-jetted into a blob on the via trench; the layered structure is heated to evaporate the liquid carrier. The interconnection element is higher at a certain point than between opposing side walls.Type: ApplicationFiled: April 16, 2018Publication date: August 16, 2018Inventors: Heikki KUISMA, Matti MANTYSALO
-
Patent number: 9969607Abstract: A device and method utilizes interconnecting layers separated by an insulating layer. A layered structure comprises a first and a second layer of electrically conductive material, and a third layer of electrically insulating material between them. A via trench is fabricated that extends from the second layer through the third layer into the first layer, a surface on the first layer of electrically conductive material forming a bottom surface of the via trench. An ink-jetting set-up for a mixture of liquid carrier and nanoparticles of conductive material is formed, and a specific process period is determined. Capillary flow of nanoparticles to peripheral edges of an ink-jetted blob of said mixture is induced. The mixture is ink-jetted into a blob on the via trench; the layered structure is heated to evaporate the liquid carrier. The interconnection element is higher at a certain point than between opposing side walls.Type: GrantFiled: December 8, 2016Date of Patent: May 15, 2018Assignee: MURATA MANUFACTURING CO., LTD.Inventors: Heikki Kuisma, Matti Mäntysalo
-
Publication number: 20170166440Abstract: A device and method utilizes interconnecting layers separated by an insulating layer. A layered structure comprises a first and a second layer of electrically conductive material, and a third layer of electrically insulating material between them. A via trench is fabricated that extends from the second layer through the third layer into the first layer, a surface on the first layer of electrically conductive material forming a bottom surface of the via trench. An ink-jetting set-up for a mixture of liquid carrier and nanoparticles of conductive material is formed, and a specific process period is determined. Capillary flow of nanoparticles to peripheral edges of an ink-jetted blob of said mixture is induced. The mixture is ink-jetted into a blob on the via trench; the layered structure is heated to evaporate the liquid carrier. The interconnection element is higher at a certain point than between opposing side walls.Type: ApplicationFiled: December 8, 2016Publication date: June 15, 2017Inventors: Heikki KUISMA, Matti MÄNTYSALO
-
Publication number: 20080186690Abstract: A method for manufacturing an electronics package is provided that comprises forming at least one module block by providing a carrier substrate having a recess, placing at least one electronic component die in said recess, filling said recess with a molding material, and depositing a circuit layer connected with said at least one component die. It further provides an electronics package, comprising a carrier substrate having a recess, at least one electronic component die placed in said recess, a molding material filling said recess, and a circuit layer connected with said at least one component die.Type: ApplicationFiled: February 7, 2007Publication date: August 7, 2008Applicant: Nokia CorporationInventors: Jani Miettinen, Pauliina Mansikkamaki, Petri Molkkari, Matti Mantysalo, Jani Valtanen
-
Publication number: 20080176359Abstract: A method for manufacturing an electronics package is provided in which a carrier is provided, at least one electronic component is placed on the carrier and a base layer is then deposited on the electronic component(s). The base layer may include a dielectric layer binding the electronic component(s) to the carrier and providing an adhesive surface for further layers. Alternatively, the base layer may include an electrically conductive layer binding the electronic component(s) to the carrier and providing electromagnetic shielding for the electronic component(s) and an adhesive surface for further layers. A corresponding shield and a computer-readable medium for storing instructions for instructing a computer to perform the manufacturing method are also provided.Type: ApplicationFiled: January 18, 2007Publication date: July 24, 2008Applicant: Nokia CorporationInventors: Petri Molkkari, Pauliina Mansikkamaki, Matti Mantysalo, Jani Miettinen, Jani Valtanen
-
Publication number: 20080171450Abstract: The invention is related to a method of manufacturing connection bumps on substrates, and in particular to a connection bump formed by depositing conductive ink and placing a conductive element on top of the ink. The final connection bump is formed by curing the conductive ink, thus providing a conductive attachment of the conductive element to a substrate surface. Ink-jet printing may be used for depositing ink on the surface.Type: ApplicationFiled: January 12, 2007Publication date: July 17, 2008Applicant: Nokia CorporationInventors: Petri Molkkari, Pauliina Mansikkamaki, Matti Mantysalo, Jani Miettinen, Jani Valtanen
-
Publication number: 20080169574Abstract: A method is presented for bare die attachment using conductive ink dots. Dielectric ink dots may be applied, for example as spacer bumps or for attaching. The conductive ink dots are not cured until die and substrate are placed on top of each other, and then cured to form a conductive connection between die and substrate.Type: ApplicationFiled: January 12, 2007Publication date: July 17, 2008Applicant: Nokia CorporationInventors: Petri Molkkari, Pauliina Mansikkamaki, Matti Mantysalo, Jani Miettinen, Jani Valtanen