Abstract: Disclosed examples include a resistor comprising a semiconductor structure having a length dimension with first and second ends spaced from one another and an intermediate region between the first and second ends, first and second metal-semiconductor compound structures on the semiconductor structure proximate the first and second ends of the semiconductor structure, the first and second metal-semiconductor compound structures being spaced apart from each other along the length dimension of the semiconductor structure, and at least one intermediate metal-semiconductor compound structure on a portion of the intermediate region of the semiconductor structure between the first and second ends, the intermediate metal-semiconductor compound structure being spaced apart from the first and second metal-semiconductor compound structures on the semiconductor structure.

Abstract: A method of forming an electronic device includes forming first, second and third doped regions at a surface of a semiconductor substrate. A first buried layer is located within the semiconductor substrate below the first, second and third doped regions. Fourth and fifth doped regions are laterally spaced apart along the substrate and extend from the surface of the substrate to the first buried layer, the first, second and third doped regions being located between the fourth and fifth doped regions. A second buried layer is formed within the substrate and between the fourth and fifth doped regions such that a first portion of the semiconductor substrate is located between the first buried layer and the second buried layer, and a second portion of the semiconductor substrate is located between the first, second and third doped regions and the second buried layer.

Abstract: Disclosed examples include a resistor comprising a semiconductor structure having a length dimension with first and second ends spaced from one another and an intermediate region between the first and second ends, first and second metal-semiconductor compound structures on the semiconductor structure proximate the first and second ends of the semiconductor structure, the first and second metal-semiconductor compound structures being spaced apart from each other along the length dimension of the semiconductor structure, and at least one intermediate metal-semiconductor compound structure on a portion of the intermediate region of the semiconductor structure between the first and second ends, the intermediate metal-semiconductor compound structure being spaced apart from the first and second metal-semiconductor compound structures on the semiconductor structure.

Abstract: Disclosed examples include a resistor comprising a semiconductor structure having a length dimension with first and second ends spaced from one another and an intermediate region between the first and second ends, first and second metal-semiconductor compound structures on the semiconductor structure proximate the first and second ends of the semiconductor structure, the first and second metal-semiconductor compound structures being spaced apart from each other along the length dimension of the semiconductor structure, and at least one intermediate metal-semiconductor compound structure on a portion of the intermediate region of the semiconductor structure between the first and second ends, the intermediate metal-semiconductor compound structure being spaced apart from the first and second metal-semiconductor compound structures on the semiconductor structure.

Abstract: A method of forming an electronic device includes forming first, second and third doped regions at a surface of a semiconductor substrate. A first buried layer is located within the semiconductor substrate below the first, second and third doped regions. Fourth and fifth doped regions are laterally spaced apart along the substrate and extend from the surface of the substrate to the first buried layer, the first, second and third doped regions being located between the fourth and fifth doped regions. A second buried layer is formed within the substrate and between the fourth and fifth doped regions such that a first portion of the semiconductor substrate is located between the first buried layer and the second buried layer, and a second portion of the semiconductor substrate is located between the first, second and third doped regions and the second buried layer.

Abstract: A semiconductor device contains a JFET with a channel layer having a first conductivity type in a substrate. The JFET has a back gate having a second, opposite, conductivity type below the channel. The back gate is laterally aligned with the channel layer. The semiconductor device is formed by forming a channel mask over the substrate of the semiconductor device which exposes an area for the channel dopants. The channel dopants are implanted into the substrate in the area exposed by the channel mask while the channel mask is in place. The back gate dopants are implanted into the substrate while the channel mask is in place, so that the implanted channel dopants are laterally aligned with the implanted channel dopants.

Abstract: Disclosed examples include a resistor comprising a semiconductor structure having a length dimension with first and second ends spaced from one another and an intermediate region between the first and second ends, first and second metal-semiconductor compound structures on the semiconductor structure proximate the first and second ends of the semiconductor structure, the first and second metal-semiconductor compound structures being spaced apart from each other along the length dimension of the semiconductor structure, and at least one intermediate metal-semiconductor compound structure on a portion of the intermediate region of the semiconductor structure between the first and second ends, the intermediate metal-semiconductor compound structure being spaced apart from the first and second metal-semiconductor compound structures on the semiconductor structure.

Abstract: A semiconductor device contains a JFET with a channel layer having a first conductivity type in a substrate. The JFET has a back gate having a second, opposite, conductivity type below the channel. The back gate is laterally aligned with the channel layer. The semiconductor device is formed by forming a channel mask over the substrate of the semiconductor device which exposes an area for the channel dopants. The channel dopants are implanted into the substrate in the area exposed by the channel mask while the channel mask is in place. The back gate dopants are implanted into the substrate while the channel mask is in place, so that the implanted channel dopants are laterally aligned with the implanted channel dopants.