Patents by Inventor Matus Lipka
Matus Lipka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240282495Abstract: Embodiments of the present disclosure provide systems and methods to determine an inductance for each of a plurality of inductors of a superconducting circuit. The plurality of inductors are routed between a plurality of superconducting devices. An amount of coupled flux between inductors of the plurality of inductors is determined. Inductor widths along portions of the plurality of inductors are adjusted based on the inductance, the amount of coupled flux, and inductance requirements of the superconducting devices.Type: ApplicationFiled: April 30, 2021Publication date: August 22, 2024Inventors: Paige FREDERICK, Kenneth RENERIS, Matus LIPKA, Jason LEE, Jamie KUESEL
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Patent number: 11741289Abstract: The present disclosure relates to routing superconducting wires in superconducting circuits and in particular to efficiently routing superconducting wires that meet inductance requirements. The superconducting wire routing technique involves modeling the target location not only as a physical location, but as a physical location (e.g., x, y, and z dimensions) combined with inductance (e.g., a target inductance range). One or more other constraints may also be included in the modeling, such as a number of wires that would need to be moved/lifted, a number of circuit-vias allowing passage through layers of the circuit, an amount of cross-coupling with other inductors, and a number of wire segments.Type: GrantFiled: April 27, 2021Date of Patent: August 29, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Michael B Goulding, Matus Lipka, Kenneth Reneris, Jason Lee
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Patent number: 11704466Abstract: Routing a circuit path includes selecting pixels on the circuit path based at least on penalty values associated with the pixels. Pixels on a rejected circuit path are penalized by increasing their penalty values. Re-routing a rejected circuit path allows for pixels on previously rejected paths to be considered when rerouting the rejected circuit path, rather than being eliminated outright.Type: GrantFiled: August 15, 2022Date of Patent: July 18, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Matus Lipka, Kenneth Reneris
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Patent number: 11671102Abstract: Systems and methods related to scheduling of tasks for execution in parallel based on geometric reach are described. An example method includes using a processor, processing information pertaining to a type of task to generate a plurality of areas of reach, where each of the plurality of areas of reach corresponds to a portion of a shared space. The method further includes using the processor, generating a plurality of inflated areas of reach by inflating each of the plurality of areas of reach based on a task-specific factor pertinent to the type of task. The method further includes automatically scheduling parallel execution of tasks associated with any of the plurality of inflated areas of reach satisfying a spatial constraint.Type: GrantFiled: December 14, 2021Date of Patent: June 6, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Daniel Vasquez Lopez, Kenneth Reneris, Jason Michael Lee, Michael B. Goulding, Paul W. Accisano, Matus Lipka, Jamie Randall Kuesel, Srinivas Raghu Gatta
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Publication number: 20220391573Abstract: Routing a circuit path includes selecting pixels on the circuit path based at least on penalty values associated with the pixels. Pixels on a rejected circuit path are penalized by increasing their penalty values. Re-routing a rejected circuit path allows for pixels on previously rejected paths to be considered when rerouting the rejected circuit path, rather than being eliminated outright.Type: ApplicationFiled: August 15, 2022Publication date: December 8, 2022Inventors: Matus LIPKA, Kenneth RENERIS
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Publication number: 20220343052Abstract: The present disclosure relates to routing superconducting wires in superconducting circuits and in particular to efficiently routing superconducting wires that meet inductance requirements. The superconducting wire routing technique involves modeling the target location not only as a physical location, but as a physical location (e.g., x, y, and z dimensions) combined with inductance (e.g., a target inductance range). One or more other constraints may also be included in the modeling, such as a number of wires that would need to be moved/lifted, a number of circuit-vias allowing passage through layers of the circuit, an amount of cross-coupling with other inductors, and a number of wire segments.Type: ApplicationFiled: April 27, 2021Publication date: October 27, 2022Inventors: Michael B. GOULDING, Matus LIPKA, Kenneth RENERIS, Jason LEE
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Publication number: 20220335195Abstract: Routing a circuit path includes selecting pixels on the circuit path based at least on penalty values associated with the pixels. Pixels on a rejected circuit path are penalized by increasing their penalty values. Re-routing a rejected circuit path allows for pixels on previously rejected paths to be considered when rerouting the rejected circuit path, rather than being eliminated outright.Type: ApplicationFiled: April 20, 2021Publication date: October 20, 2022Inventors: Matus LIPKA, Kenneth RENERIS
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Patent number: 11461529Abstract: Routing a circuit path includes selecting pixels on the circuit path based at least on penalty values associated with the pixels. Pixels on a rejected circuit path are penalized by increasing their penalty values. Re-routing a rejected circuit path allows for pixels on previously rejected paths to be considered when rerouting the rejected circuit path, rather than being eliminated outright.Type: GrantFiled: April 20, 2021Date of Patent: October 4, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Matus Lipka, Kenneth Reneris
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Publication number: 20220109448Abstract: Systems and methods related to scheduling of tasks for execution in parallel based on geometric reach are described. An example method includes using a processor, processing information pertaining to a type of task to generate a plurality of areas of reach, where each of the plurality of areas of reach corresponds to a portion of a shared space. The method further includes using the processor, generating a plurality of inflated areas of reach by inflating each of the plurality of areas of reach based on a task-specific factor pertinent to the type of task. The method further includes automatically scheduling parallel execution of tasks associated with any of the plurality of inflated areas of reach satisfying a spatial constraint.Type: ApplicationFiled: December 14, 2021Publication date: April 7, 2022Inventors: Daniel VASQUEZ LOPEZ, Kenneth RENERIS, Jason Michael LEE, Michael B. GOULDING, Paul W. ACCISANO, Matus LIPKA, Jamie Randall KUESEL, Srinivas Raghu GATTA
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Patent number: 11233515Abstract: Systems and methods related to scheduling of tasks for execution in parallel based on geometric reach are described. An example method includes processing information pertaining to connectivity among superconducting components and nodes included in a shared floor plan to generate a plurality of areas of reach, where each of the plurality of areas of reach corresponds to a portion of the shared floor plan. The method further includes generating a plurality of inflated areas of reach by inflating each of the plurality of areas of reach based on a target inductance of wires for routing signals among the superconducting components and the nodes included in the shared floor plan. The method further includes scheduling parallel execution of tasks for routing wires among a subset of the superconducting components and the nodes within any of the plurality of inflated areas of reach satisfying a geometric constraint.Type: GrantFiled: May 29, 2020Date of Patent: January 25, 2022Assignee: Microsoft Technology Licensing, LLCInventors: Daniel Vasquez Lopez, Kenneth Reneris, Jason Michael Lee, Michael B. Goulding, Paul W. Accisano, Matus Lipka, Jamie Randall Kuesel, Srinivas Raghu Gatta
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Publication number: 20210376835Abstract: Systems and methods related to scheduling of tasks for execution in parallel based on geometric reach are described. An example method includes processing information pertaining to connectivity among superconducting components and nodes included in a shared floor plan to generate a plurality of areas of reach, where each of the plurality of areas of reach corresponds to a portion of the shared floor plan. The method further includes generating a plurality of inflated areas of reach by inflating each of the plurality of areas of reach based on a target inductance of wires for routing signals among the superconducting components and the nodes included in the shared floor plan. The method further includes scheduling parallel execution of tasks for routing wires among a subset of the superconducting components and the nodes within any of the plurality of inflated areas of reach satisfying a geometric constraint.Type: ApplicationFiled: May 29, 2020Publication date: December 2, 2021Inventors: Daniel VASQUEZ LOPEZ, Kenneth RENERIS, Jason Michael LEE, Michael B. GOULDING, Paul W. ACCISANO, Matus LIPKA, Jamie Randall KUESEL, Srinivas Raghu GATTA
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Patent number: 10686740Abstract: Techniques for learned user preference- and behavior-based notification filtering are described herein. In one or more implementations, notifications obtained from computer applications are filtered for presentation to a user. Example notifications include notifications about emails, text messages, phone calls, web-page specific messages, antivirus application messages, and so forth. As part of filtering the notifications, interactions of a user with the notifications and with events for which the notifications can be generated are monitored. The monitored interactions are used to learn user preferences and behaviors for notifications in different contexts of user interaction with computing devices. Data is collected that describes characteristics of a current context. Based on the current context, importance scores are computed for new notifications using the learned user preferences and behaviors. The importance scores can then be used to determine which of the new notifications to present to the user.Type: GrantFiled: September 9, 2016Date of Patent: June 16, 2020Assignee: Microsoft Technology Licensing, LLCInventors: Roberto Bojorquez Alfaro, Matus Lipka, Lee Dicks Clark, Boaz Sapir
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Publication number: 20180077097Abstract: Techniques for learned user preference- and behavior-based notification filtering are described herein. In one or more implementations, notifications obtained from computer applications are filtered for presentation to a user. Example notifications include notifications about emails, text messages, phone calls, web-page specific messages, antivirus application messages, and so forth. As part of filtering the notifications, interactions of a user with the notifications and with events for which the notifications can be generated are monitored. The monitored interactions are used to learn user preferences and behaviors for notifications in different contexts of user interaction with computing devices. Data is collected that describes characteristics of a current context. Based on the current context, importance scores are computed for new notifications using the learned user preferences and behaviors. The importance scores can then be used to determine which of the new notifications to present to the user.Type: ApplicationFiled: September 9, 2016Publication date: March 15, 2018Applicant: Microsoft Technology Licensing, LLCInventors: Roberto Bojorquez Alfaro, Matus Lipka, Lee Dicks Clark, Boaz Sapir