Abstract: Phase-coherent differential structures contain a phase-coherent transformer having two pairs of phase-coherent coupled differential inductors.

Abstract: An amplifier circuit comprises a detection power input circuit for receiving an RF signal, and a bias circuit that includes an output for generating a bias signal in response to a reference control voltage. The power detector further comprises a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal. The amplifier circuit further comprises a power amplifier coupled to the bias circuit. The power amplifier includes a driver stage providing the RF signal. The detection circuit compensates temperature variation of the inputted detection voltage of the received RF signal.

Abstract: Tuning devices and methods are disclosed. One of the devices comprises a metal structure connected with artificial dielectric elements, and variable capacitance devices. Each variable capacitance device is connected with a respective artificial dielectric element and with a control signal. Control of the variation of the capacitance allows the desired tuning. Another device comprises metallic structures connected with artificial dielectric elements and switches connected between the artificial dielectric elements. Turning ON and OFF the switches allows the capacitance between artificial dielectric elements to be varied and a signal guided by the metallic structures to be tuned.

Abstract: An amplifier circuit comprises a detection power input circuit for receiving an RF signal, and a bias circuit that includes an output for generating a bias signal in response to a reference control voltage. The power detector further comprises a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal. The amplifier circuit further comprises a power amplifier coupled to the bias circuit. The power amplifier includes a driver stage providing the RF signal. The detection circuit compensates temperature variation of the inputted detection voltage of the received RF signal.

Abstract: A front-end module comprises a plurality of chips that includes first and second functional blocks and an interconnection circuit. The first functional block is formed using a first process type and includes a digital control circuit that generates a digital control signal in response to an external control signal from outside the front end module. The second functional block is formed using a second process type and includes a digitally controlled circuit controlled by the digital control signal generated by the first functional block. The second process type is different from the first process type. The interconnection circuit couples the digital control circuit and the digitally controlled circuit to provide the digital control signal to the digitally controlled circuit. In one aspect, the first functional block may be a low noise amplifier formed by a pseudomorphic high electron mobility transistor process.

Abstract: An attenuator system comprises an attenuator and a control circuit for controlling the attenuation of the attenuator. In one embodiment, the attenuator comprises two diodes or two diode connected transistors, and the control circuit comprises two transistors as the only active devices. In another embodiment, the control circuit comprises another transistor in a shut down circuit.

Abstract: Generation of Terahertz range (300 GHz to 3 THz) frequencies is increasingly important for communication, imaging and spectroscopic systems, including concealed object detection. Apparatus and methods describe generating multiple phase signals which are phase-locked at a fundamental frequency, which are then interleaved into an output which is a multiple of the fundamental frequency. By way of example phase generators comprise cross-coupling transistors (e.g., NMOS) and twist coupling transistors (NMOS) for generating a desired number of phase-locked output phases. A rectifying interleaver comprising a transconductance stage and Class B amplifiers provides superimposition of the phases into an output signal. The invention allows frequency output to exceed the maximum frequency of oscillation of a given device technology, such as CMOS in which a 324 GHz VCO in 90 nm digital CMOS with 4 GHz tuning was realized.

Abstract: An amplifier circuit comprises a detection power input circuit for receiving an RF signal, and a bias circuit that includes an output for generating a bias signal in response to a reference control voltage. The power detector further comprises a detection circuit for generating a power control voltage having a voltage characteristic that offsets temperature characteristics of the received RF signal. The amplifier circuit further comprises a power amplifier coupled to the bias circuit. The power amplifier includes a driver stage providing the RF signal. The detection circuit compensates temperature variation of the inputted detection voltage of the received RF signal.

Abstract: The present invention relates to a wireless data system which has a transmitter including a transmission buffer. The transmitter is configured to transmit a plurality of packets of encoded data, wherein a level of the transmission buffer is encoded in one of the packets of encoded data. The system further has a wireless receiver for receiving the plurality of packets. The receiver has at least one receiving component that receives the plurality of packets to generate a plurality of decoded signals, wherein the at least one receiving component is configured to receive one of the packets of encoded data from the transmitter to determine the level of transmission buffer. The receiving component is further configured to store the plurality of packets received in a receive buffer, to determine the level of the receive buffer, and to calculate an aggregate buffer level from the transmission buffer and the receive buffer.

Abstract: Systems and methods are disclosed for wireless transmission and reception of data including processing and buffering features. According to one or more exemplary aspects, there is provided a wireless audio receiver for receiving a plurality of packets of encoded audio data. Moreover, the receiver includes at least one receiving component that receives the plurality of packets to generate a plurality of decoded signals, a decoding component that decodes the first packet of encoded data transmitted to produce decoded data, and a selecting component that identifies the mechanisms for receiving additional encoded data. Other exemplary embodiments may include one or more receiving components that processing data regarding antenna, frequencies and channels selected for transmission, as well as an audio component that receives the decoded signals and produces decoded audio signals.

Abstract: The present invention relates to a method of wirelessly transmitting and receiving audio digital signals of the type having a first plurality of blocks with each block having a second plurality of frames, with each frame having a third plurality of subframes, with each subframe having a preamble and a binary data. The method efficiently transmits and recomposes the digital audio signals by searching for the preamble associated with a subframe, which is the first subframe of a frame, with the frame being the first frame of a block, and then transmitting wirelessly only the binary data of each subframe, in each frame, in each block thereafter. In a preferred embodiment, the protocol for the transmission of data calls for each data packet that is transmitted to consist of 512 bytes. The data packet transmitted by the transmitter must be acknowledged by the transmission of an acknowledgement (ACK) packet from the receiver.

Abstract: Interleaved three-dimensional (3D) on-chip differential inductors 110, 120 and transformer 100 are disclosed. The interleaved 3D on-chip differential inductors 110, 120 and transformer 100 make the best use of multiple metal layers in mainstream standard processes, such as CMOS, BiCMOS and SiGe technologies.

Abstract: The present disclosure relates to coupled circuits and methods of coupling circuits having a power supply wherein a plurality of transistors are inductively coupled directly to the power supply for providing a single DC supply voltage directly to each of the plurality of transistors, and wherein a plurality of transformers have primary and secondary windings, the primary and secondary windings providing, at least in part, inductive loads for inductively coupling the plurality of transistors to the power supply, the plurality of transformers also providing an AC signal path for coupling neighboring ones of the plurality of transistors together.

Abstract: Tuning devices and methods are disclosed. One of the devices comprises a metal structure connected with artificial dielectric elements, and variable capacitance devices. Each variable capacitance device is connected with a respective artificial dielectric element and with a control signal. Control of the variation of the capacitance allows the desired tuning. Another device comprises metallic structures connected with artificial dielectric elements and switches connected between the artificial dielectric elements. Turning ON and OFF the switches allows the capacitance between artificial dielectric elements to be varied and a signal guided by the metallic structures to be tuned.

Abstract: Radio frequency/millimeter wave integrated circuits (RF/MMICs) that employ a resonance mechanism between an input stage and a transistor are disclosed. The circuits contain an input stage, a transistor; and a transformer connected between either a gate or a base of the transistor and a voltage supply of the input stage. The methods disclosed maximize either a collector current or a drain current of a transistor by placing a transformer between the transistor and a voltage source.

Abstract: Phase-coherent differential structures contain a phase-coherent transformer having two pairs of phase-coherent coupled differential inductors.

Abstract: An integrated circuit module has a substrate with an exposed surface. An integrated circuit die has a first surface and a second surface opposite the first surface, and has a plurality of bonding pads on the second surface. The integrated circuit die is positioned with its first surface on the exposed surface of the substrate. A plurality of dielectric layers cover the second surface of the integrated circuit die. At least one conductive layer is sandwiched between a pair of the plurality of dielectric layers, and forms one or more passive elements electrically connected to the plurality of bonding pads of the integrated circuit die, through one or more holes in one of the plurality of dielectric layers.

Abstract: A system or method for controlling a voltage controlled oscillator (VCO) or LO buffer includes an amplitude detector for detecting an amplitude value at a node corresponding to the at least one output line. A comparator compares the detected amplitude value with a predetermined amplitude value, and outputs a first digital value when the detected amplitude value is greater than the predetermined amplitude value, and a second digital value when the detected amplitude value is less than the predetermined amplitude value. An accumulator accumulates outputs of the comparator so as to provide an accumulated digital amplitude value. A digital-to-analog converter converts the accumulated digital amplitude value to an accumulated analog amplitude value. The analog accumulated amplitude value is provided as an updated bias control signal to the bias transistor of the VCO or LO buffer.