Abstract: A test configuration for the metrological examination of a test object (in particular, an integrated circuit) contains an apparatus (in the form of a microscope) for representing the test object. The apparatus generates a representation image for representing the test object. A test device (with an associated test element) taps off an electrical signal at the test object, and generates a representation image for representing the electrical signal. Another device carries out a real-time coupling of the representation image of the test device with the representation image of the apparatus. The test configuration enables the metrological examination of the test object to be carried out cost and time-effectively.