Abstract: A process for fabricating a semiconductor device using local silicide interconnection lines make it possible to fabricate an integrated circuit having a plurality of electronic elements disposed on a semi-conductor substrate. The electronic elements are formed on the substrate such that they are grouped into a first region and a second region adjacent to the first region, each of these regions having predetermined conductivities. The first region has a layer of dielectric material disposed upon it with at least one capacitive element disposed on the dielectric layer. The capacitive element includes a first electrode layer and a second electrode layer. The second region has at least one double junction metal-insulator semi-conductor field effect transistor (MISFET) located therein. The MISFET includes at least three regions, a gate region and two active regions, a source region and a drain region.

Abstract: A semiconductor device including a substrate of first conductivity type provided with an epitaxial region of the opposite conductivity type. The base of a first vertical bipolar transistor is formed by a localized epitaxial layer present above the first region, the collector of the transistor and the base of a second vertical bipolar transistor adjoining each other in the region.

Abstract: A method of manufacturing transistors by means of ion implantation is characterized by the implantation of a uniform extrinsic base zone, by providinbg a mask having at least two windows, and by the implantation of the emitter zone and then of the intrinsic active base zone via a first window, after which the implanted zones are annealed.

Abstract: A semiconductor device having two transistors which have a common collector.The device is characterized in that the distance between the two base zones is such that during operation of the device the depletion zones of the base-collector junctions merge into each other. Application to the manufacture of photo-Darlington devices.

Abstract: A monolithic semiconductor device comprising at least two complementary transistors, in which the base zone of a first transistor and the collector zone of a second transistor are provided in a first epitaxial layer, while the emitter zone of the second transistor, the emitter zone of the first transistor and the base zone of the second transistor are provided in a second epitaxial layer. A separation groove is provided between the transistors in the second epitaxial layer.

Abstract: A device having complementary transistors and method of manufacturing same.A monolithic device which comprises at least two transistors of opposite conductivity types.The device is provided on a substrate which is covered with an epitaxial region of the opposite conductivity type and in this region the base of a transistor is formed by a localized epitaxial layer which is present above the said region, the collector of the said transistor and the base of the other transistor adjoining each other in said region.Amplifiers of the Darlington type FIG. 4.