Patents by Inventor Maurice G. Le Van Suu

Maurice G. Le Van Suu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7013187
    Abstract: A control procedure is provided for use during a regulation stage and according to a set point of a physical dynamic system, the set point being subject to, whilst operating, the influence of several physical quantities represented by input parameters, and adopting a behavior defined by at least a first physical output parameter, obliged to take a value represented by the set point, the first output parameter being linked to at least a first of the input parameters by a first transfer function of the system. According to the control procedure, a characterization stage is implemented in which at least a first inverse transfer function linking the first input parameter to the first output parameter is experimentally determined. A modeling stage is implemented in which the first inverse transfer function is translated through a fuzzy logic model in the form of a first set of ranges of the first output parameter, to each of which is attributed a specific value of the first input parameter.
    Type: Grant
    Filed: October 10, 2003
    Date of Patent: March 14, 2006
    Assignee: STMicroelectronics, S.A.
    Inventor: Maurice G. Le Van Suu
  • Publication number: 20040122535
    Abstract: A control procedure is provided for use during a regulation stage and according to a set point of a physical dynamic system, the set point being subject to, whilst operating, the influence of several physical quantities represented by input parameters, and adopting a behavior defined by at least a first physical output parameter, obliged to take a value represented by the set point, the first output parameter being linked to at least a first of the input parameters by a first transfer function of the system. According to the control procedure, a characterization stage is implemented in which at least a first inverse transfer function linking the first input parameter to the first output parameter is experimentally determined. A modeling stage is implemented in which the first inverse transfer function is translated through a fuzzy logic model in the form of a first set of ranges of the first output parameter, to each of which is attributed a specific value of the first input parameter.
    Type: Application
    Filed: October 10, 2003
    Publication date: June 24, 2004
    Applicant: STMICROELECTRONICS S.A.
    Inventor: Maurice G. Le Van Suu
  • Patent number: 6347308
    Abstract: In a system of information processing by fuzzy logic, force coefficients are associated with values of variables processed by a fuzzy logic processor. The force coefficients show the degree of urgency with which information sent has to be taken into consideration or indicating the imperative nature of this information. In a network structure, this force coefficient is incorporated into address signals conveyed on the network. Then, in the membership function memories of the fuzzy logic processors, there are memories that take account of the classes of addresses for the extraction therefrom of the character of urgency of the information elements concerned.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: February 12, 2002
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Maurice G. Le Van Suu
  • Publication number: 20010011257
    Abstract: In a system of information processing by fuzzy logic, force coefficients are associated with values of variables processed by a fuzzy logic processor. The force coefficients show the degree of urgency with which information sent has to be taken into consideration or indicating the imperative nature of this information. In a network structure, this force coefficient is incorporated into address signals conveyed on the network. Then, in the membership function memories of the fuzzy logic processors, there are memories that take account of the classes of addresses for the extraction therefrom of the character of urgency of the information elements concerned.
    Type: Application
    Filed: April 8, 1998
    Publication date: August 2, 2001
    Inventor: MAURICE G. LE VAN SUU
  • Patent number: 6014021
    Abstract: An electricity meter includes a first current probe, a first voltage probe and a display unit memorizing its contents. This meter comprises a fuzzy logic processor having a fuzzy logic decision-making computer with a non-volatile memory available to store membership functions corresponding to the first voltage and current probes and to store decision rules. The computer takes a decision, according to the rules, that is weighted by the membership functions and is aimed at incrementing the contents of the display unit. This meter has the particular feature, among others, by which it can be recalibrated on site.
    Type: Grant
    Filed: January 2, 1997
    Date of Patent: January 11, 2000
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Maurice G. Le Van Suu
  • Patent number: 5714933
    Abstract: A system for protection of goods against theft includes a control unit and protection modules associated with the goods, the control unit including cordless communication means and the protection modules including movement detection circuitry to find out whether the goods are being handled, and cordless communications circuitry to send an alarm message to the control unit if a movement is detected.
    Type: Grant
    Filed: January 11, 1996
    Date of Patent: February 3, 1998
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Maurice G. Le Van Suu
  • Patent number: 5535344
    Abstract: To connect an apparatus to a transmission channel, use is made of a device comprising a first coupling circuit to couple the device to the channel, a second circuit to process the signals received or transmitted and to verify that they conform to a pre-set standard, and a third circuit, normally a microprocessor, connected firstly to the processing circuit and secondly to the apparatus to make it carry out instructions corresponding to the information elements received. The second circuit comprises a control register associated with the type of the signals transmitted and a buffer memory to receive the signals transmitted or to be transmitted. The microprocessor is then made to carry out the instructions loaded into a program memory of this microprocessor as a function of the state of this control register.
    Type: Grant
    Filed: December 8, 1993
    Date of Patent: July 9, 1996
    Assignee: SGS-Thomson Microelectronics, S.A.
    Inventor: Maurice G. Le Van Suu
  • Patent number: 5497284
    Abstract: The disclosure relates to the methods and devices that enable series type buses to be protected against the consequences of a short-circuit in the decentralized units connected to this bus. There are provided means to detect the equalization of the potentials of the data wires and means enabling the disconnection, under the control of these detection means, of the decentralized unit responsible for the short circuit. A device is also provided to short circuit the supply wires of the bus according to a predetermined sequence in order to inform the central processing unit of the disconnection of said decentralized unit. The disclosure enables the protection of the central processing unit and of the decentralized units, connected to the bus, that are not malfunctioning.
    Type: Grant
    Filed: February 17, 1994
    Date of Patent: March 5, 1996
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Maurice G. Le Van Suu