Abstract: A periodically adjustable frequency generator having as the source of the equency signal a voltage controlled crystal oscillator. A power supply provides a continuous voltage to the oscillator which corresponds to the initial operating frequency. As a periodic error correction signal is received, it is fed through a delay circuit and then to a holding circuit which has an output equal to the last received input. The output of the holding circuit is summed with the power supply signal to provide a corrected voltage signal to the voltage controlled crystal oscillator.

Abstract: In a digital communications system having widely dispersed nodes transmitg between each other, a method and apparatus for synchronizing the processing of data at a node. Data transmitted between nodes is stored in speed buffers. The output of each buffer at a node is connected to the nodal processor and is controlled by the nodal clock. Synchronization is accomplished by performing a periodic adjustment of the frequency of the nodal clock. This adjustment is arrived at by sampling the buffer content of each node and extracting an error signal which represents the buffer position relative to the half full buffer position. The error signal is suitably weighted by a control and summed with all other weighted buffer error signals to produce a total error signal, which is added linearly to the original initial condition of the nodal clock and converted to an equivalent frequency.