Patents by Inventor Maurice Ribble

Maurice Ribble has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180329465
    Abstract: Disclosed are methods and systems for intelligent adjustment of an immersive multimedia workload in a portable computing device (“PCD”), such as a virtual reality (“VR”) or augmented reality (“AR”) workload. An exemplary embodiment monitors one or more performance indicators comprising a motion to photon latency associated with the immersive multimedia workload. Performance parameters associated with thermally aggressive processing components are adjusted to reduce demand for power while ensuring that the motion to photon latency is and/or remains optimized. Performance parameters that may be adjusted include, but are not limited to including, eye buffer resolution, eye buffer MSAA, timewarp CAC, eye buffer FPS, display FPS, timewarp output resolution, textures LOD, 6DOF camera FPS, and fovea size.
    Type: Application
    Filed: May 11, 2017
    Publication date: November 15, 2018
    Inventors: MEHRAD TAVAKOLI, Idreas Mir, Moinul Khan, Ronald Alton, Gheorghe Cascaval, Rajiv Vijayakumar, Mriganka Mondal, Maurice Ribble, Martin Renschler
  • Patent number: 10043318
    Abstract: Certain aspects of the present disclosure provide methods and apparatus for operating a wearable display device. Certain aspects of the present disclosure provide a method for operating a wearable display device. The method includes determining a position of the wearable display device based on a motion sensor. The method includes rendering, by a graphics processing unit, an image based on the determined position. The method includes determining a first updated position of the wearable display device based on the motion sensor. The method includes warping, by a warp engine, a first portion of the rendered image based on the first updated position. The method includes displaying the warped first portion of the rendered image on a display of the wearable display device.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: August 7, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Moinul Khan, Nhon Quach, Martin Renschler, Ramesh Chandrasekhar, Assaf Menachem, Ning Bi, Maurice Ribble
  • Patent number: 9858637
    Abstract: Systems, methods, and computer programs are disclosed for reducing motion-to-photon latency and memory bandwidth in a virtual reality display system. An exemplary method involves receiving sensor data from one or more sensors tracking translational and rotational motion of a user for a virtual reality application. An updated position of the user is computed based on the received sensor data. The speed and acceleration of the user movement may be computed based on the sensor data. The updated position, the speed, and the acceleration may be provided to a warp engine configured to update a rendered image before sending to a virtual reality display based on one or more of the updated position, the speed, and the acceleration.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: January 2, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Nhon Quach, Moinul Khan, Maurice Ribble, Martin Renschler, Mehrad Tavakoli, Rashmi Kulkarni, Ricky Wai Kit Yuen, Todd Lemoine
  • Patent number: 9047686
    Abstract: In general, aspects of this disclosure describe example techniques for efficient storage of data of various data types for graphics processing. In some examples, a processing unit may assign first and second contiguous range of addresses for a first and second data type, respectively. The processing unit may store at least one of graphics data of the first or second data type or addresses of the graphics data of the first or second data type within blocks whose addresses are within the first and second contiguous range of addresses, respectively. The processing unit may store, in cache lines of a cache, the graphics data of the first data type, and the graphics data of the second data type.
    Type: Grant
    Filed: February 10, 2011
    Date of Patent: June 2, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Colin Sharp, Zachary Aaron Pfeffer, Eduardus A. Metz, Maurice Ribble
  • Patent number: 8982136
    Abstract: This disclosure describes techniques for automatically selecting a rendering mode for use by a graphics processing unit (GPU) to render graphics data for display. More specifically, the techniques include evaluating at least two metrics associated with rendering graphics data of one or more rendering units, and automatically selecting either an immediate rendering mode or a deferred rendering mode for a current rendering unit based on the evaluated metrics. The selected rendering mode may be the one of the rendering modes predicted to use less power and/or system bandwidth to render the graphics data of the current rendering unit. A rendering unit may comprise a set of frames, a frame, a portion of a frame, multiple render targets associated with a frame, a single render target associated with a frame, or a portion of a single render target.
    Type: Grant
    Filed: May 16, 2011
    Date of Patent: March 17, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Maurice Ribble, Colin Sharp, Jeffrey Leger
  • Patent number: 8654133
    Abstract: Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is coupled to receive processed data corresponding to the frames from each of the processors. The interlink module divides a first frame into multiple frame portions by dividing pixels of the first frame using at least one balance point. The interlink module dynamically determines a position for the balance point that minimizes differences between the workload of the processors during processing of commands and/or data of one or more subsequent frames.
    Type: Grant
    Filed: February 6, 2013
    Date of Patent: February 18, 2014
    Assignee: ATI Technologies ULC
    Inventors: Jonathan L. Campbell, Maurice Ribble
  • Patent number: 8400457
    Abstract: Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is coupled to receive processed data corresponding to the frames from each of the processors. The interlink module divides a first frame into multiple frame portions by dividing pixels of the first frame using at least one balance point. The interlink module dynamically determines a position for the balance point that minimizes differences between the workload of the processors during processing of commands and/or data of one or more subsequent frames.
    Type: Grant
    Filed: December 9, 2009
    Date of Patent: March 19, 2013
    Assignee: ATI Technologies, Inc.
    Inventors: Jonathan L. Campbell, Maurice Ribble
  • Publication number: 20120293519
    Abstract: This disclosure describes techniques for automatically selecting a rendering mode for use by a graphics processing unit (GPU) to render graphics data for display. More specifically, the techniques include evaluating at least two metrics associated with rendering graphics data of one or more rendering units, and automatically selecting either an immediate rendering mode or a deferred rendering mode for a current rendering unit based on the evaluated metrics. The selected rendering mode may be the one of the rendering modes predicted to use less power and/or system bandwidth to render the graphics data of the current rendering unit. A rendering unit may comprise a set of frames, a frame, a portion of a frame, multiple render targets associated with a frame, a single render target associated with a frame, or a portion of a single render target.
    Type: Application
    Filed: May 16, 2011
    Publication date: November 22, 2012
    Applicant: QUALCOMM Incorporated
    Inventors: Maurice Ribble, Colin Sharp, Jeffrey Leger
  • Publication number: 20120206466
    Abstract: In general, aspects of this disclosure describe example techniques for efficient storage of data of various data types for graphics processing. In some examples, a processing unit may assign first and second contiguous range of addresses for a first and second data type, respectively. The processing unit may store at least one of graphics data of the first or second data type or addresses of the graphics data of the first or second data type within blocks whose addresses are within the first and second contiguous range of addresses, respectively. The processing unit may store, in cache lines of a cache, the graphics data of the first data type, and the graphics data of the second data type.
    Type: Application
    Filed: February 10, 2011
    Publication date: August 16, 2012
    Applicant: Qualcomm Incorporated
    Inventors: Colin Sharp, Zachary Aaron Pfeffer, Eduardus A. Metz, Maurice Ribble
  • Publication number: 20100085365
    Abstract: Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is coupled to receive processed data corresponding to the frames from each of the processors. The interlink module divides a first frame into multiple frame portions by dividing pixels of the first frame using at least one balance point. The interlink module dynamically determines a position for the balance point that minimizes differences between the workload of the processors during processing of commands and/or data of one or more subsequent frames.
    Type: Application
    Filed: December 9, 2009
    Publication date: April 8, 2010
    Applicant: ATI Technologies, Inc.
    Inventors: Jonathan L. Campbell, Maurice Ribble
  • Patent number: 7649537
    Abstract: Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is coupled to receive processed data corresponding to the frames from each of the processors. The interlink module divides a first frame into multiple frame portions by dividing pixels of the first frame using at least one balance point. The interlink module dynamically determines a position for the balance point that minimizes differences between the workload of the processors during processing of commands and/or data of one or more subsequent frames.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: January 19, 2010
    Assignee: ATI Technologies, Inc.
    Inventors: Jonathan L. Campbell, Maurice Ribble
  • Publication number: 20060267989
    Abstract: Systems and methods are provided for processing data. The systems and methods include multiple processors that each couple to receive commands and data, where the commands and/or data correspond to frames of video that include multiple pixels. An interlink module is coupled to receive processed data corresponding to the frames from each of the processors. The interlink module divides a first frame into multiple frame portions by dividing pixels of the first frame using at least one balance point. The interlink module dynamically determines a position for the balance point that minimizes differences between the workload of the processors during processing of commands and/or data of one or more subsequent frames.
    Type: Application
    Filed: May 27, 2005
    Publication date: November 30, 2006
    Inventors: Jonathan Campbell, Maurice Ribble