Patents by Inventor Maurice Rivoire

Maurice Rivoire has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9865545
    Abstract: A structure includes a substrate having an upper surface provided with recesses and coated with a continuous barrier layer topped with a continuous copper layer filling at least the recesses. The structure is planarized by a chemical-mechanical polishing of the copper, such a polishing being selective with respect to the barrier layer so that copper remains in the recesses and is coplanar with the upper surface of the substrate. Two such structures are then direct bonded to each other (copper to copper) with opposite areas having a same topology.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: January 9, 2018
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Maurice Rivoire, Viorel Balan
  • Publication number: 20170179035
    Abstract: A structure includes a substrate having an upper surface provided with recesses and coated with a continuous barrier layer topped with a continuous copper layer filling at least the recesses. The structure is planarized by a chemical-mechanical polishing of the copper, such a polishing being selective with respect to the barrier layer so that copper remains in the recesses and is coplanar with the upper surface of the substrate. Two such structures are then direct bonded to each other (copper to copper) with opposite areas having a same topology.
    Type: Application
    Filed: March 2, 2017
    Publication date: June 22, 2017
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Maurice Rivoire, Viorel Balan
  • Patent number: 9620412
    Abstract: A method for modifying crystalline structure of a copper element with a planar surface, including: a) producing a copper standard having large grains, wherein the standard includes a planar surface, b) reducing roughness of the planar surfaces to a roughness of less than 1 nm, c) cleaning the planar surfaces, d) bringing the two planar surfaces into contact, and e) annealing.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: April 11, 2017
    Assignees: Commissariat à l'énergie atomique et aux énergies alternatives, STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Lea Di Cioccio, Pierric Gueguen, Maurice Rivoire
  • Patent number: 9620385
    Abstract: A structure includes a substrate having an upper surface provided with recesses and coated with a continuous barrier layer topped with a continuous copper layer filling at least the recesses. The structure is planarized by: a) chemical-mechanical polishing of the copper, such a polishing being selective with respect to the barrier layer so that copper remains in the recesses and is set back with respect to the upper surface of the substrate; b) depositing on the exposed surface of the structure a material covering at least the copper at the level of the recesses; and c) chemical-mechanical planarizing of the structure to expose the substrate with the copper remaining buried under the material. Two such structures are then direct bonded to each other with opposite areas of material having a same topology.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: April 11, 2017
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Maurice Rivoire, Viorel Balan
  • Publication number: 20150340269
    Abstract: A structure includes a substrate having an upper surface provided with recesses and coated with a continuous barrier layer topped with a continuous copper layer filling at least the recesses. The structure is planarized by: a) chemical-mechanical polishing of the copper, such a polishing being selective with respect to the barrier layer so that copper remains in the recesses and is set back with respect to the upper surface of the substrate; b) depositing on the exposed surface of the structure a material covering at least the copper at the level of the recesses; and c) chemical-mechanical planarizing of the structure to expose the substrate with the copper remaining buried under the material. Two such structures are then direct bonded to each other with opposite areas of material having a same topology.
    Type: Application
    Filed: May 7, 2015
    Publication date: November 26, 2015
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat A L'Energie Atomique et aux Energies Alternatives
    Inventors: Maurice Rivoire, Viorel Balan
  • Patent number: 8647983
    Abstract: A method for bonding a first copper element onto a second copper element including forming a crystalline copper layer enriched in oxygen on each of surfaces of each of the first and second elements through which the elements will be in contact, the total thickness of both layers being less than 6 nm, which includes: a) polishing the surfaces so as to obtain a roughness of less than 1 nm RMS, and hydrophilic surfaces, b) cleaning the surfaces to suppress presence of particles due to the polishing and the major portion of corrosion inhibitors, and c) putting both crystalline copper layer enriched in oxygen in contact with each other.
    Type: Grant
    Filed: July 1, 2010
    Date of Patent: February 11, 2014
    Assignees: Commissariat a l'energie atomique et aux energies alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Lea Di Cioccio, Pierric Gueguen, Maurice Rivoire
  • Patent number: 8562934
    Abstract: A surface of a substrate comprising microcavities leading out of the substrate is placed in contact with an aqueous solution comprising a plurality of suspended particles and a fabric. Perpendicular pressure is applied the expanse of the substrate between the fabric and the surface of the substrate, and relative movement of the fabric and the surface is applied to the expanse of the substrate. At least one particle is thus fed into each microcavity, therein forming a porous material that is a catalyst material for nanothread or nanotube growth.
    Type: Grant
    Filed: March 30, 2009
    Date of Patent: October 22, 2013
    Assignees: Commissariat a l'Energie Atomique et aux Energies Alternatives, STMicroelectronics (Crolles 2) SAS
    Inventors: Jean-Christophe Coiffic, Maurice Rivoire
  • Patent number: 8323733
    Abstract: A surface of a support comprising through micropassages is brought into contact with an aqueous solution comprising a plurality of particles in suspension and a pad. A pressure perpendicular to the plane of the support, between the pad and the surface of the support, and a relative movement of the pad and of the surface in a direction parallel to the plane of the support are applied. At least one particle is thus introduced in each microgap to form a porous material therein.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: December 4, 2012
    Assignees: Commisariat a l'Energie Atomique, STMicroelectronics (Crolles 2) SAS
    Inventors: Jean-Christophe Coiffic, Maurice Rivoire
  • Publication number: 20120100657
    Abstract: A method for bonding a first copper element onto a second copper element including forming a crystalline copper layer enriched in oxygen on each of surfaces of each of the first and second elements through which the elements will be in contact, the total thickness of both layers being less than 6 nm, which includes: a) polishing the surfaces so as to obtain a roughness of less than 1 nm RMS, and hydrophilic surfaces, b) cleaning the surfaces to suppress presence of particles due to the polishing and the major portion of corrosion inhibitors, and c) putting both crystalline copper layer enriched in oxygen in contact with each other.
    Type: Application
    Filed: July 1, 2010
    Publication date: April 26, 2012
    Applicants: Stmicroelectronics (Crolles 2) SAS, Commisariat A L'Energie Atomique et Aux Ene Alt
    Inventors: Lea Di Cioccio, Pierric Gueguen, Maurice Rivoire
  • Publication number: 20120097296
    Abstract: A method for modifying crystalline structure of a copper element with a planar surface, including: a) producing a copper standard having large grains, wherein the standard includes a planar surface, b) reducing roughness of the planar surfaces to a roughness of less than 1 nm, c) cleaning the planar surfaces, d) bringing the two planar surfaces into contact, and e) annealing.
    Type: Application
    Filed: July 1, 2010
    Publication date: April 26, 2012
    Applicant: COMMISARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Lea Di Cioccio, Pierric Gueguen, Maurice Rivoire
  • Publication number: 20110034329
    Abstract: A surface of a substrate comprising microcavities leading out of the substrate is placed in contact with an aqueous solution comprising a plurality of suspended particles and a fabric. Perpendicular pressure is applied the expanse of the substrate between the fabric and the surface of the substrate, and relative movement of the fabric and the surface is applied to the expanse of the substrate. At least one particle is thus fed into each microcavity, therein forming a porous material that is a catalyst material for nanothread or nanotube growth.
    Type: Application
    Filed: March 30, 2009
    Publication date: February 10, 2011
    Applicants: Commissariat A L'Energie Atomique Et Aux Energies Alternatives, STMicroelectronics (Crolles 2 ) SAS
    Inventors: Jean-Christophe Coiffic, Maurice Rivoire
  • Patent number: 7713766
    Abstract: A light sensor located above an integrated circuit including a lower electrode, a heavily-doped amorphous silicon layer of a first conductivity type, and a lightly-doped amorphous silicon layer of a second conductivity type. The lightly-doped amorphous silicon layer rests on a planar surface at least above and in the vicinity of the lower electrode.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: May 11, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Danielle Thomas, Maurice Rivoire
  • Publication number: 20090252871
    Abstract: A surface of a support comprising through micropassages is brought into contact with an aqueous solution comprising a plurality of particles in suspension and a pad. A pressure perpendicular to the plane of the support, between the pad and the surface of the support, and a relative movement of the pad and of the surface in a direction parallel to the plane of the support are applied. At least one particle is thus introduced in each microgap to form a porous material therein.
    Type: Application
    Filed: March 17, 2009
    Publication date: October 8, 2009
    Applicants: COMMISSARIAT A L'ENERGIE ATOMIQUE, STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Jean-Christophe Coiffic, Maurice Rivoire
  • Publication number: 20090075410
    Abstract: A light sensor located above an integrated circuit including a lower electrode, a heavily-doped amorphous silicon layer of a first conductivity type, and a lightly-doped amorphous silicon layer of a second conductivity type. The lightly-doped amorphous silicon layer rests on a planar surface at least above and in the vicinity of the lower electrode.
    Type: Application
    Filed: November 21, 2008
    Publication date: March 19, 2009
    Applicant: STMicroelectronics S.A.
    Inventors: Danielle Thomas, Maurice Rivoire
  • Patent number: 7492026
    Abstract: A light sensor located above an integrated circuit including a lower electrode, a heavily-doped amorphous silicon layer of a first conductivity type, and a lightly-doped amorphous silicon layer of a second conductivity type. The lightly-doped amorphous silicon layer rests on a planar surface at least above and in the vicinity of the lower electrode.
    Type: Grant
    Filed: December 30, 2005
    Date of Patent: February 17, 2009
    Assignee: STMicroelectronics S.A.
    Inventors: Danielle Thomas, Maurice Rivoire
  • Patent number: 7252695
    Abstract: Abrasive composition for the integrated circuits electronics industry comprising an aqueous acid suspension of individualized colloidal silica particles not linked to each other by siloxane bonds and an abrasive surfactant, this abrasive being for mechanical chemical polishing in the integrated circuits industry, comprising a fabric impregnated by such a composition, and a process for mechanical chemical polishing.
    Type: Grant
    Filed: November 8, 2006
    Date of Patent: August 7, 2007
    Assignee: AZ Electronic Materials USA Corp.
    Inventors: Eric Jacquinot, Pascal Letourneau, Maurice Rivoire
  • Patent number: 7200908
    Abstract: A method of making a variable capacitor by forming a grove portion in an insulating substrate, two upper portions of the substrate located on either side of the groove portion forming two lateral edges, a conductive layer covering the inside of the groove portion, a flexible conductive membrane, placed above the groove portion by bearing on the edges, a dielectric layer covering the conductive layer or the membrane to insulate the conductive layer and the membrane, and terminals of application of a voltage between the conductive layer and the membrane, and such that the depth of the groove portion continuously increases from one of the edges to the bottom of the groove portion, and that the conductive layer covers the inside of the groove portion at least to reach one of the two edges, that it may cover.
    Type: Grant
    Filed: May 26, 2006
    Date of Patent: April 10, 2007
    Assignees: STMicroelectronics S.A., Commissariat a l'Energie Atomique
    Inventors: Fabrice Cassett, Guillaume Bouche, Maurice Rivoire
  • Publication number: 20070051918
    Abstract: Abrasive composition for the integrated circuits electronics industry comprising an aqueous acid suspension of individualized colloidal silica particles not linked to each other by siloxane bonds and an abrasive surfactant, this abrasive being for mechanical chemical polishing in the integrated circuits industry, comprising a fabric impregnated by such a composition, and a process for mechanical chemical polishing.
    Type: Application
    Filed: November 8, 2006
    Publication date: March 8, 2007
    Applicant: AZ Electronic Materials USA Corp.
    Inventors: Eric Jacquinot, Pascal Letourneau, Maurice Rivoire
  • Patent number: 7144814
    Abstract: Abrasive composition for the integrated circuits electronics industry comprising an aqueous acid suspension of individualized colloidal silica particles not linked to each other by siloxane bonds and an abrasive surfactant, this abrasive being for mechanical chemical polishing in the integrated circuits industry, comprising a fabric impregnated by such a composition, and a process for mechanical chemical polishing.
    Type: Grant
    Filed: October 27, 1999
    Date of Patent: December 5, 2006
    Assignee: AZ Electronic Materials USA Corp.
    Inventors: Eric Jacquinot, Pascal Letourneau, Maurice Rivoire
  • Publication number: 20060213044
    Abstract: A variable capacitor having a groove portion formed in an insulating substrate, two upper portions of the substrate located on either side of the groove portion forming two lateral edges, a conductive layer covering the inside of the groove portion, a flexible conductive membrane, placed above the groove portion by bearing on the edges, a dielectric layer covering the conductive layer or the membrane to insulate the conductive layer and the membrane, and terminals of application of a voltage between the conductive layer and the membrane, and such that the depth of the groove portion continuously increases from one of the edges to the bottom of the groove portion, and that the conductive layer covers the inside of the groove portion at least to reach one of the two edges, that it may cover.
    Type: Application
    Filed: May 26, 2006
    Publication date: September 28, 2006
    Applicants: STMicroelectronics S.A., Commissariat A L'energie Atomique
    Inventors: Fabrice Casset, Guillaume Bouche, Maurice Rivoire