Abstract: A silicon based (e.g., SiGe, CMOS, or BiCMOS) transmitter includes an algorithm that strategically segment and pre-distort the input signal according to its power; a reconfigurable power amplifier (PA) having a plurality of PA sections, wherein the plurality of PA sections comprise discrete weighted transistor arrays that are digitally turned OFF or ON according to a magnitude of an input signal; an impedance matching network equipped with a common-mode feedback (CMFB) mechanism configured to reduce common-mode glitches at an output of the PA due to ON/OFF manipulations of the PA segments; and a 1:N transformer, which comprises a capacitive matching engine and a power detector, disposed between the impedance matching network and the reconfigurable linear PA.

Abstract: A current-limiting switch circuit including a first power semiconductor switch, at least one sense semiconductor switch configured to share a common-gate and a common drain with the first power semiconductor switch, and a second power semiconductor switch serially connected to the first power semiconductor switch and sharing a common node therebetween. The first power semiconductor switch, the first sense semiconductor switch, and the second power semiconductor switch are configured to limit at least a back current.

Abstract: A system for acquiring environmental information measurements. The 5 system (100) utilize a sensor, (205) a front-end circuit, (310) a loop filter (315), a switch controller (206), and a reduced-order loop control circuit to provide reliable data measurements while providing robust system behavior. The system further includes a sensor simulator (330) for simulating the operation of the sensor (205) and testing the operation of the front-end circuit (310) and the loop filter (315).

Abstract: A method and apparatus for measuring and compensating for stray capacitance of a micro-machined sensor of an accelerometer system is disclosed. Stray capacitance differences between a top plate and a sensing element and between a bottom plate and the sensing element degrade accelerometer performance if not compensated for. Measurement of stray capacitance difference is achieved by operating the accelerometer in two calibration phases and measuring the steady-state output voltage in each of the two phases. In calibration phase 1, no force is applied to the sensor during clock intervals 1-4. In calibration phase 2, a dummy force up is applied and then a dummy force down is applied during those intervals 1-4. The difference in the output voltage of the two calibration phases is representative of the difference in stray capacitance of the sensor. Capacitance is added to the top or bottom plates in an amount proportional to the measured stray capacitance.

Abstract: A comparator (10) provides a high speed comparison between at least two input signals and includes at least two stages (12) and (14). Each stage (12 and 14) includes a pair of transistors (24), a complementary pair of transistors (28) and an enabling transistor (26). The stages are coupled to provide positive feedback back to the first stage (12). A controller (15) operably couples to the enabling transistors. When the first input signal (16) is at a higher voltage level than the second input signal (18), the first comparison output (20) goes low. Conversely, when the second input signal (18) is at a higher voltage level than the first input signal (16), the second comparison output (22) goes low. When the first comparison output (20) goes low, the second enabling transistor (34) is disabled by the controller (15). When the second comparison output goes low, the first enabling transistor (26) is disabled by the controller (15).

Abstract: A regulated supply (10) includes a charge pump (12), an output (14), a sensing circuit (16), and a control circuit (18). The charge pump (12) includes a variable capacitor (33) whose capacitance C.sub.v may be varied to compensate for changing loads and input power supply levels. The sensing circuit (16) senses the voltage level at the output (14) and provides feedback signals (66) and (68) to the control circuit (18). The voltage at the output (14) is dependent upon the capacitance C.sub.v of the variable capacitor (33). Therefore, responsive to the feedback signals (66) and (68) from the sensing circuit, the control circuit (18) varies the capacitance C.sub.v of the variable capacitor (33). The control circuit (18) then may vary the value of C.sub.v in a step-like manner to correct for the voltage at the output (14).

Abstract: A regulated charge pump (43) includes a charge pump core (114) having a charging capacitor (80). An output voltage on a first terminal (72) of the charging capacitor (80) is transferred to a holding capacitor (81). A second terminal (73) of the charging capacitor (80) is alternatively connected to positive and negative power supply voltage terminals in response to non-overlapping clock signals. The first terminal (72) of the charging capacitor (80) is connected through first (150) and second (151) transistors to the positive power supply voltage terminal. A proportional portion (112) provides a coarse regulation by biasing the first transistor (150) proportional to a comparison between a predetermined fraction of an output voltage and a reference voltage. An integrating portion (113) provides a precise regulation by biasing the second transistor (151) proportional to an integrated difference between the output voltage and a reference voltage.

Abstract: A bandgap voltage reference circuit (50, 100) which operates at low power supply voltages provides a reference current as either a one- or a two-.DELTA.V.sub.BE voltage across a first resistor (82, 133). A current proportional to the reference current is mirrored into one terminal of a second resistor (94, 133) to provide the bandgap voltage. Compensation for base currents injected into the circuit (50, 100) by two transistors forming the .DELTA.V.sub.BE reference is provided. In one embodiment (50), base currents of first (66) and second (87) transistors which have equal emitter areas and collector current density as the two transistors (68, 85) forming the .DELTA.V.sub.BE reference compensate for the injected base currents. In another embodiment (100), a single transistor (127) injects current substantially equal to the sum of the base currents of the two transistors (116, 121) forming the .DELTA.V.sub.BE reference.