Abstract: In accordance with an embodiment, a method includes receiving an indication of a changed load condition or voltage characteristic of a power supply providing power to a load via an output port of the power supply in a first mode, and switching regulation of the power supply from sourcing a current to the load in the first mode to sinking the current from the load in a second mode in response to receiving the indication of the changed load condition or voltage characteristic. Sinking the current from the load in the second mode includes controlling the power supply to transfer energy from the output port of the power supply to an input port of the power supply.

Abstract: This disclosure is directed to techniques for efficiently driving multiple light emitting diode (LED) strings from a single regulated source. The techniques of this disclosure may utilize a switched capacitor DC-to-DC converter between the regulated source and the LED string. The switched capacitor (SC) converter may have multiple gain levels to efficiently match the drive voltage from the regulated source to the LED string voltage for each particular LED string. In some examples, the SC converter may have multiple gain levels such that the SC converter may deliver an LED string voltage that is approximately a multiple of the number of LEDs in the LED string. Using capacitor components in an SC converter may have the advantages of small size and low cost.

Abstract: A method and circuit are described in which a maximum voltage is determined from among a plurality of series load voltages, where each series load voltage of the plurality of series load voltages is a voltage defined by a corresponding series of N loads of a plurality of series of N loads, where N is an integer greater than one. Also, a minimum voltage may be determined from among the plurality of series load voltages. Next, the maximum voltage from among the plurality of series load voltages may be compared with the minimum voltage from among the plurality of series load voltages to make a determination as to whether the maximum voltage from among the plurality of series load voltages exceeds the minimum from among the plurality of series load voltages by a threshold voltage. Then, an indication can be output based on the results of the determination.

Abstract: An embodiment method for short-circuit detection includes determining a set of local reference voltages each associated with a respective load chain in a plurality of load chains, and determining a global reference voltage in accordance with the set of local reference voltages. The method also includes determining, for each load chain in the plurality of load chains, a respective per-chain reference voltage in accordance with the global reference voltage, and comparing, for each load chain in the plurality of load chains, the respective per-chain reference voltage relative to a respective measured voltage across each load chain to determine a respective short-circuit condition.

Abstract: During a start-up phase, each corresponding test current is delivered to a corresponding chain of loads of a plurality of chain of loads. Each chain of loads is coupled between a common node and a corresponding output node. Each chain of loads includes N series-coupled loads, where N is an integer greater than one. A maximum voltage is determined from among the output voltages, where the output voltages are the voltages at the output nodes. Also, a minimum voltage is determined from among the output voltages. The maximum voltage from among the output voltages is compared with the minimum voltage from among the output voltages to make a determination as to whether the maximum voltage exceeds the minimum voltage by a threshold. An indication is output based on a result of the determination.

Abstract: Current spikes may occur when dynamically shortening a light emitting diode chain. These current spikes can be avoided by using a voltage control loop to regulate the output of the LED driver just prior to the transition period. Specifically, regulation of the LED driver is switched from a current control loop (e.g., a control loop regulating the output current of the led driver) to a voltage control loop (e.g., a control loop regulating the output voltage of the led driver) just before the LED chain is shortened. The voltage control loop then reduces the voltage of the LED driver to a target voltage prior to shortening the LED chain, thereby allowing the LED chain to be shortened without eliciting a current spike.

Abstract: During a start-up phase, each corresponding test current is delivered to a corresponding chain of loads of a plurality of chain of loads. Each chain of loads is coupled between a common node and a corresponding output node. Each chain of loads includes N series-coupled loads, where N is an integer greater than one. A maximum voltage is determined from among the output voltages, where the output voltages are the voltages at the output nodes. Also, a minimum voltage is determined from among the output voltages. The maximum voltage from among the output voltages is compared with the minimum voltage from among the output voltages to make a determination as to whether the maximum voltage exceeds the minimum voltage by a threshold. An indication is output based on a result of the determination.

Abstract: Current spikes may occur when dynamically shortening a light emitting diode chain. These current spikes can be avoided by using a voltage control loop to regulate the output of the LED driver just prior to the transition period. Specifically, regulation of the LED driver is switched from a current control loop (e.g., a control loop regulating the output current of the led driver) to a voltage control loop (e.g., a control loop regulating the output voltage of the led driver) just before the LED chain is shortened. The voltage control loop then reduces the voltage of the LED driver to a target voltage prior to shortening the LED chain, thereby allowing the LED chain to be shortened without eliciting a current spike.

Abstract: A method and circuit are described in which a maximum voltage is determined from among a plurality of series load voltages, where each series load voltage of the plurality of series load voltages is a voltage defined by a corresponding series of N loads of a plurality of series of N loads, where N is an integer greater than one. Also, a minimum voltage may be determined from among the plurality of series load voltages. Next, the maximum voltage from among the plurality of series load voltages may be compared with the minimum voltage from among the plurality of series load voltages to make a determination as to whether the maximum voltage from among the plurality of series load voltages exceeds the minimum from among the plurality of series load voltages by a threshold voltage. Then, an indication can be output based on the results of the determination.

Abstract: A current regulator controller includes a differential amplifier that is arranged to output a current sense signal based on a differential input signal and a first stage trim signal. The current regulator controller also includes a first stage trim circuit that is arranged to provide the first stage trim signal. The current regulator controller also includes a digital-to-analog converter that is arranged to provide a set signal based on a digital input signal and a second stage trim signal. The current regulator controller also includes a second stage trim circuit that is arranged to provide the second stage trim signal. The current regulator controller also includes an error amplifier that is arranged to output an error signal based on the set signal and the current sense signal. The regulation of the current is based on the error signal.

Abstract: A current regulator controller includes a differential amplifier that is arranged to output a current sense signal based on a differential input signal and a first stage trim signal. The current regulator controller also includes a first stage trim circuit that is arranged to provide the first stage trim signal. The current regulator controller also includes a digital-to-analog converter that is arranged to provide a set signal based on a digital input signal and a second stage trim signal. The current regulator controller also includes a second stage trim circuit that is arranged to provide the second stage trim signal. The current regulator controller also includes an error amplifier that is arranged to output an error signal based on the set signal and the current sense signal. The regulation of the current is based on the error signal.

Abstract: Methods, devices, and integrated circuits are disclosed for applying an active output voltage discharge for a buck-boost converter. One example is directed to a method of operating a buck-boost converter that comprises an inductor, an output capacitor, and an output. The method includes receiving an indication of an altered output voltage requirement in the buck-boost converter. The method further includes deactivating a control loop in the buck-boost converter. The method further includes applying an active discharge of voltage from the output capacitor through the inductor to ground, thereby altering the voltage at the output of the buck-boost converter from a first output voltage to a second output voltage that corresponds to the altered output voltage requirement. The method further includes reactivating the control loop.

Abstract: Methods, devices, and integrated circuits are disclosed for applying an active output voltage discharge for a buck-boost converter. One example is directed to a method of operating a buck-boost converter that comprises an inductor, an output capacitor, and an output. The method includes receiving an indication of an altered output voltage requirement in the buck-boost converter. The method further includes deactivating a control loop in the buck-boost converter. The method further includes applying an active discharge of voltage from the output capacitor through the inductor to ground, thereby altering the voltage at the output of the buck-boost converter from a first output voltage to a second output voltage that corresponds to the altered output voltage requirement. The method further includes reactivating the control loop.

Abstract: In a circuit, a high side driver control circuit outputs gating signals to a high side driver of a synchronous converter responsive to a pulse width modulated input signal. A synchronous rectifier driver circuit outputs a gating signal to a synchronous rectifier of the synchronous converter responsive to the pulse width modulated input signal. An inhibit circuit inhibits the gating signal to the synchronous rectifier upon detection of a zero crossing condition. A circuit detects the zero crossing condition respective to comparing a measured value to a nominal value adjusted by a delta value. A duty cycle observer circuit determines the average duty cycle of the pulse width modulated input signal and varies the reference value.

Abstract: Circuit and method for controlling a synchronous power converter in discontinuous conduction mode with increased efficiency is disclosed. Circuitry is provided outputting gating signals to a high side driver and a synchronous rectifier responsive to a pulse width modulated input signal, an inhibit circuit for inhibiting the gating signal to the synchronous rectifier upon detection of a zero crossing condition; a comparator receiving a measured circuit value from the synchronous converter and a reference value and outputting a zero crossing condition; and a duty cycle observer circuit for determining the average duty cycle of the pulse width modulated input signal and for varying the reference value. A method is disclosed determining if the average duty cycle in the pulse width modulated input signal is increasing in response to varying a reference value, and inhibiting a synchronous rectifier control signal when the comparator indicates a zero crossing condition.

Abstract: A method drives a transistor half-bridge. The method includes measuring a delay time between an edge of an input signal and an corresponding edge of a phase signal, and saving the delay time as a saved delay time value. The phase signal is the output of the transistor half-bridge. In the method, the following steps are repeated until the saved delay time value differs from the delay time by more than a given threshold: decrementing the delay-value of a programmable delay circuit and the saved delay time value by a given decrement, the programmable delay circuit coupled to a control terminal of a first transistor of the half-bridge, and measuring the delay time between an edge of the input signal and an corresponding edge of the phase signal.

Abstract: A circuit arrangement includes an ESD protection circuit for protecting a circuit node of the circuit arrangement against electrostatic discharge. The circuit arrangement includes a control circuit configured to deactivate the ESD protection circuit in response to a state signal representing a state of operation of the circuit arrangement.

Abstract: A method drives a transistor half-bridge. The method includes measuring a delay time between an edge of an input signal and an corresponding edge of a phase signal, and saving the delay time as a saved delay time value. The phase signal is the output of the transistor half-bridge. In the method, the following steps are repeated until the saved delay time value differs from the delay time by more than a given threshold: decrementing the delay-value of a programmable delay circuit and the saved delay time value by a given decrement, the programmable delay circuit coupled to a control terminal of a first transistor of the half-bridge, and measuring the delay time between an edge of the input signal and an corresponding edge of the phase signal.

Abstract: A drive circuit is disclosed including a first feedback circuit designed to generate a first feedback signal from a first voltage to be controlled and a first reference voltage. The drive circuit further includes a signal converter designed to generate a second feedback signal from the first feedback signal such that the difference between the first feedback signal and a first amplitude value of a periodic signal approximately matches the difference between the second feedback signal and a second amplitude value of the periodic signal. The drive circuit also includes a first pulse width modulator which receives the first feedback signal and the periodic signal and generates the first pulse width-modulated signal. In addition the drive circuit includes a second pulse width modulator which receives the second feedback signal and the periodic signal and generates the second pulse width-modulated signal.

Abstract: A method is disclosed for controlling a first transistor in a half-bridge circuit which also includes a second transistor. The transistors can be controlled by applying drive voltages to their gates. During a switch-off operation of the second transistor, the amplitude of the drive voltage of the second transistor is compared with a first threshold value and a second threshold value. A switch-on operation for the first transistor is started following a specified first period which begins at a first time when the drive voltage of the second transistor undershoots the first threshold value. The first threshold value is set in accordance with a second period which begins at a second time when the amplitude of the drive voltage of the second transistor undershoots the second threshold value. The second period ends at another time when the first transistor adopts a specified initial operating state during the switch-on operation.