Abstract: Preferred embodiments of the present invention are a switching converter, an integrated circuit package, and method for controlling a switching converter. An embodiment of the invention is a switching converter comprising a first compensation network having a first node coupled to an error voltage and a second node coupled to electrical ground and a second compensation network having an input coupled to the error voltage. A frequency domain transfer function of the first compensation network comprises a first zero and a plurality of first poles, and a frequency domain transfer function of the second compensation network comprises a second zero and a second pole.

Abstract: Preferred embodiments of the present invention are a switching converter, an integrated circuit package, and method for controlling a switching converter. An embodiment of the invention is a switching converter comprising a first compensation network having a first node coupled to an error voltage and a second node coupled to electrical ground and a second compensation network having an input coupled to the error voltage. A frequency domain transfer function of the first compensation network comprises a first zero and a plurality of first poles, and a frequency domain transfer function of the second compensation network comprises a second zero and a second pole.

Abstract: In a low-gain current-mode voltage regulator having a PWM comparator in response to the varying output voltage and inductor current of the voltage regulator to produce a PWM signal to regulate the output voltage, an offset signal is derived from a subtraction between the inputs of the PWM comparator, and the offset signal is injected into the PWM comparator to cancel the output offset of the voltage regulator.

Abstract: In a low-gain current-mode voltage regulator having a PWM comparator in response to the varying output voltage and inductor current of the voltage regulator to produce a PWM signal to regulate the output voltage, an offset signal is derived from a subtraction between the inputs of the PWM comparator, and the offset signal is injected into the PWM comparator to cancel the output offset of the voltage regulator.

Abstract: An adding circuit includes storage capacitors and a a switch mechanism, the storage capacitors being charged up via voltage signals to be added during a first clock phase. During a second clock phase, the storage capacitors are connected in parallel, with the result that a charge equalization occurs. After the charge equalization, the voltage dropped across the parallel-connected storage capacitors is equal to a sum of the signals to be added except for a scaling factor. In one embodiment, the adding circuit is used in a sigma-delta modulator circuit.

Abstract: An adding circuit is disclosed. The adding circuit includes storage capacitors and switching or switching means, the storage capacitors being charged up via voltage signals to be added during a first clock phase. During a second clock phase, the storage capacitors are connected in parallel, with the result that a charge equalization occurs. After the charge equalization, the voltage dropped across the parallel-connected storage capacitors is equal to a sum of the signals to be added except for a scaling factor. In one embodiment, the adding circuit is used in a sigma-delta modulator circuit.