Abstract: The present invention relates to the use of a silicon-based porous catalytic system for oligomerizing light olefins, the porous silicon-based catalytic system having an average pore diameter of between about 1 nm and about 5 nm and an acidity level of between about 150 ?mol/g and about 650 ?mol/g, and prepared from at least one hydrolysable silicon-based compound, or other source of silicon, and at least one non-ionic surface active agent. The invention also relates to a process for oligomerizing light olefins using the silicon-based porous catalytic system, and to certain silicon-based porous catalytic systems.

Abstract: A process of preparation of silicon-based multifunctional catalytic systems synthesised together with one or more surface active agents is described. Also described is a multifunctional silicon-based porous catalytic system including at least one porous catalytic support structurally including silica and at least one other metal or non-metal oxide chosen from aluminium, zirconium, and boron. The catalytic support is synthesised together with one or more surface active agents, and at least one or more catalyst chosen from among metallic elements of groups 6-10 of the periodic table of the elements. The catalytic systems are useful in hydrogenation and/or decyclisation reactions of (poly)aromatic compounds, especially for improving the quality of diesel fuels and increasing their cetane number.

Abstract: A semiconductor test device for acquiring a multiplexed clock signal from LSI output data and using the clock to test the LSI. The device includes a time interpolator 30 and registers 41a to 41n connected in series. The time interpolator has flip-flops 31a to 31n connected in parallel for inputting output data from an LSI 1 to be measured, a delay circuit 32 for successively inputting strobes delayed at a constant timing interval to the flip-flops 31 and outputting time-series level data, and an encoder 34 for inputting the time-series level data output from the flip-flops 31 and encoding it into position data indicating an edge timing. The registers 41a to 41n successively store position data from the encoder 34 and output them at a predetermined timing. The device further includes a digital filter for outputting the position data output from the registers 41 as a recovery clock.