Patents by Inventor Maurizio Maria Ferrara

Maurizio Maria Ferrara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10964627
    Abstract: Packaged semiconductor device having a frame, of conductive material; a body of semiconductor material, fixed to the frame through a first adhesive layer; a heatsink element, fixed to the body through a second adhesive layer; and a packaging mass surrounding the body and, at least partially, the frame and the heatsink element. The heatsink element is formed by a heatsink die facing, and coplanar to, a main face of the device and by a spacer structure, which includes a pair of pedestals projecting from the perimeter of the heatsink die towards the body and rest on the body.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: March 30, 2021
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Concetto Privitera, Maurizio Maria Ferrara, Fabio Vito Coppone
  • Publication number: 20200098670
    Abstract: Packaged semiconductor device having a frame, of conductive material; a body of semiconductor material, fixed to the frame through a first adhesive layer; a heatsink element, fixed to the body through a second adhesive layer; and a packaging mass surrounding the body and, at least partially, the frame and the heatsink element. The heatsink element is formed by a heatsink die facing, and coplanar to, a main face of the device and by a spacer structure, which includes a pair of pedestals projecting from the perimeter of the heatsink die towards the body and rest on the body.
    Type: Application
    Filed: November 26, 2019
    Publication date: March 26, 2020
    Inventors: Concetto PRIVITERA, Maurizio Maria FERRARA, Fabio Vito COPPONE
  • Patent number: 10535587
    Abstract: Packaged semiconductor device having a frame, of conductive material; a body of semiconductor material, fixed to the frame through a first adhesive layer; a heat-sink element, fixed to the body through a second adhesive layer; and a packaging mass surrounding the body and, at least partially, the frame and the heat-sink element. The heat-sink element is formed by a heat-sink die facing, and coplanar to, a main face of the device and by a spacer structure, which includes a pair of pedestals projecting from the perimeter of the heat-sink die towards the body and rest on the body.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: January 14, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Concetto Privitera, Maurizio Maria Ferrara, Fabio Vito Coppone
  • Publication number: 20160225699
    Abstract: Packaged semiconductor device having a frame, of conductive material; a body of semiconductor material, fixed to the frame through a first adhesive layer; a heat-sink element, fixed to the body through a second adhesive layer; and a packaging mass surrounding the body and, at least partially, the frame and the heat-sink element. The heat-sink element is formed by a heat-sink die facing, and coplanar to, a main face of the device and by a spacer structure, which includes a pair of pedestals projecting from the perimeter of the heat-sink die towards the body and rest on the body.
    Type: Application
    Filed: December 7, 2015
    Publication date: August 4, 2016
    Inventors: Concetto PRIVITERA, Maurizio Maria FERRARA, Fabio Vito COPPONE
  • Patent number: 9362142
    Abstract: A method for making a set of electronic devices is proposed.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: June 7, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Agatino Minotti, Maurizio Maria Ferrara
  • Patent number: 9202766
    Abstract: A power device includes a chip of semiconductor material and a further chip of semiconductor material on each of which at least one power transistor is integrated; each chip comprises a first conduction terminal on a first surface, and a second conduction terminal and a control terminal on a second surface opposite the first surface, and an insulating body embedding said chip and said further chip. In the solution according to one or more embodiments of the present disclosure, the first surface of said chip faces the second surface of said further chip, and the power device further comprises a first heat-sink arranged between said chip and said further chip and electrically coupled with the first conduction terminal of said chip and with the second conduction terminal of said further chip, the control terminal of said further chip being electrically insulated from the first heat-sink.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: December 1, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventors: Cristiano Gianluca Stella, Gaetano Pignataro, Maurizio Maria Ferrara
  • Patent number: 8890313
    Abstract: An electronic device includes a first chip and a second chip, where each chip has a first conduction terminal on a first surface and a second conduction terminal on a second surface. An insulating body surrounds the first and second chip, a first heat-sink coupled with the first conduction terminals of the first and second chip, and a second heat-sink coupled with the second conduction terminals of the first and second chip. A portion of the first heat-sink and/or the second heat-sink being exposed from the insulating body. The electronic device includes a first conductive lead and a second conductive lead exposed from the insulating body for through-hole mounting of the electronic device on an electronic board, the first conductive lead being coupled with the first heat-sink and the second conductive lead being coupled with the second heat-sink.
    Type: Grant
    Filed: April 26, 2013
    Date of Patent: November 18, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Cristiano Gianluca Stella, Gaetano Pignataro, Maurizio Maria Ferrara
  • Publication number: 20140001647
    Abstract: A method for making a set of electronic devices is proposed.
    Type: Application
    Filed: June 19, 2013
    Publication date: January 2, 2014
    Inventors: Agatino Minotti, Maurizio Maria Ferrara
  • Publication number: 20130285229
    Abstract: An electronic device includes a first chip and a second chip, where each chip has a first conduction terminal on a first surface and a second conduction terminal on a second surface. An insulating body surrounds the first and second chip, a first heat-sink coupled with the first conduction terminals of the first and second chip, and a second heat-sink coupled with the second conduction terminals of the first and second chip. A portion of the first heat-sink and/or the second heat-sink being exposed from the insulating body. The electronic device includes a first conductive lead and a second conductive lead exposed from the insulating body for through-hole mounting of the electronic device on an electronic board, the first conductive lead being coupled with the first heat-sink and the second conductive lead being coupled with the second heat-sink.
    Type: Application
    Filed: April 26, 2013
    Publication date: October 31, 2013
    Applicant: STMicroelectronics S.r.l.
    Inventors: Cristiano Gianluca Stella, Gaetano Pignataro, Maurizio Maria Ferrara
  • Publication number: 20130285230
    Abstract: A power device includes a chip of semiconductor material and a further chip of semiconductor material on each of which at least one power transistor is integrated; each chip comprises a first conduction terminal on a first surface, and a second conduction terminal and a control terminal on a second surface opposite the first surface, and an insulating body embedding said chip and said further chip. In the solution according to one or more embodiments of the present disclosure, the first surface of said chip faces the second surface of said further chip, and the power device further comprises a first heat-sink arranged between said chip and said further chip and electrically coupled with the first conduction terminal of said chip and with the second conduction terminal of said further chip, the control terminal of said further chip being electrically insulated from the first heat-sink.
    Type: Application
    Filed: April 26, 2013
    Publication date: October 31, 2013
    Applicant: STMicroelectronics S.r.l.
    Inventors: Cristiano Gianluca Stella, Gaetano Pignataro, Maurizio Maria Ferrara
  • Patent number: 7372142
    Abstract: A vertical conduction power electronic device package and corresponding assembly method comprising at least a metal frame suitable to house at least a plate or first semiconductor die having at least a first and a second conduction terminal on respective opposed sides of the first die. The first conduction terminal being in contact with said metal frame and comprising at least an intermediate frame arranged in contact with said second conduction terminal.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: May 13, 2008
    Assignee: STMicroelectronics, S.r.l.
    Inventors: Maurizio Maria Ferrara, Angelo Magri, Agatino Minotti
  • Publication number: 20050275082
    Abstract: A vertical conduction power electronic device package and corresponding assembly method comprising at least a metal frame suitable to house at least a plate or first semiconductor die having at least a first and a second conduction terminal on respective opposed sides of the first die. The first conduction terminal being in contact with said metal frame and comprising at least an intermediate frame arranged in contact with said second conduction terminal.
    Type: Application
    Filed: May 31, 2005
    Publication date: December 15, 2005
    Inventors: Maurizio Maria Ferrara, Angelo Magri, Agatino Minotti