Abstract: The bias and precharging circuit comprises a bias part and a precharging part of the bit line together with a sensing amplifier operating by comparison of the voltage of the bit line and a dummy bit line. The precharging part includes components which turn off the bias and precharging parts as soon as the sensing amplifier has read the cell subjected to precharging. The bias part includes components for amplifying the voltage unbalance produced by bias between the bit line and the dummy bit line. It provides a current-mirror to cause said voltage unbalance independently of the precharging part.

Abstract: Two P channel selection transistors are inserted in respective connecting circuit branches between two external pins with voltages Vcc and Vpp respectively and an internal node. A switching circuit controls said selection transistors. Circuit means are provided to hold the body bias of the selection transistors at a voltage equal to the highest voltage present from time to time at said external pins.