Patents by Inventor Mauro Castelli

Mauro Castelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • DATA SENSING WITH ERROR CORRECTION
    Publication number: 20240086104
    Abstract: Multiple copies of a stored data are sensed from a subset of memory cells of an array of memory cells into a plurality of latch elements in a page buffer coupled to the array of memory cells. Two or more latch elements are selected by enabling a respective select line of each of the two or more latch elements. An output data is determined based on a sensing of the conducting line driven by the two or more latch elements.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 14, 2024
    Inventors: Mauro Castelli, Luigi Pilolli
  • Single node power management for multiple memory devices
    Patent number: 10170167
    Abstract: Some embodiments include apparatuses and methods having a node to couple to a plurality of memory devices, memory cells, and a module to perform an operation on the memory cells, to cause at least one change in a level of a signal at the node in order to make a request to perform a particular stage of the operation such that the request is detectable by the memory devices, and to perform the particular stage of the operation after the request is acknowledged. Other embodiments are described.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: January 1, 2019
    Assignee: Micron Technology, Inc.
    Inventors: Mauro Castelli, Luca De Santis, Luigi Pilolli, Maria Luisa Gallese
  • SINGLE NODE POWER MANAGEMENT FOR MULTIPLE MEMORY DEVICES
    Publication number: 20160267953
    Abstract: Some embodiments include apparatuses and methods having a node to couple to a plurality of memory devices, memory cells, and a module to perform an operation on the memory cells, to cause at least one change in a level of a signal at the node in order to make a request to perform a particular stage of the operation such that the request is detectable by the memory devices, and to perform the particular stage of the operation after the request is acknowledged. Other embodiments are described.
    Type: Application
    Filed: May 23, 2016
    Publication date: September 15, 2016
    Inventors: Mauro Castelli, Luca De Santis, Luigi Pilolli, Maria Luisa Gallese
  • Single node power management for multiple memory devices
    Patent number: 9349423
    Abstract: Some embodiments include apparatuses and methods having a node to couple to a plurality of memory devices, memory cells, and a module to perform an operation on the memory cells, to cause at least one change in a level of a signal at the node in order to make a request to perform a particular stage of the operation such that the request is detectable by the memory devices, and to perform the particular stage of the operation after the request is acknowledged. Other embodiments are described.
    Type: Grant
    Filed: September 3, 2014
    Date of Patent: May 24, 2016
    Assignee: Micron Technology, Inc.
    Inventors: Mauro Castelli, Luca De Santis, Luigi Pilolli, Maria Luisa Gallese
  • SINGLE NODE POWER MANAGEMENT FOR MULTIPLE MEMORY DEVICES
    Publication number: 20160064052
    Abstract: Some embodiments include apparatuses and methods having a node to couple to a plurality of memory devices, memory cells, and a module to perform an operation on the memory cells, to cause at least one change in a level of a signal at the node in order to make a request to perform a particular stage of the operation such that the request is detectable by the memory devices, and to perform the particular stage of the operation after the request is acknowledged. Other embodiments are described.
    Type: Application
    Filed: September 3, 2014
    Publication date: March 3, 2016
    Inventors: Mauro Castelli, Luca De Santis, Luigi Pilolli, Maria Luisa Gallese
  • Data interleaving module
    Patent number: 9189440
    Abstract: The present disclosure includes apparatuses and methods related to a data interleaving module. A number of methods can include interleaving data received from a bus among modules according to a selected one of a plurality of data densities per memory cell supported by an apparatus and transferring the interleaved data from the modules to a register.
    Type: Grant
    Filed: July 14, 2014
    Date of Patent: November 17, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Luigi Pilolli, Maria-Luisa Gallese, Mauro Castelli
  • DATA INTERLEAVING MODULE
    Publication number: 20150019787
    Abstract: The present disclosure includes apparatuses and methods related to a data interleaving module. A number of methods can include interleaving data received from a bus among modules according to a selected one of a plurality of data densities per memory cell supported by an apparatus and transferring the interleaved data from the modules to a register.
    Type: Application
    Filed: July 14, 2014
    Publication date: January 15, 2015
    Inventors: Luigi Pilolli, Maria-Luisa Gallese, Mauro Castelli
  • Data interleaving module
    Patent number: 8804452
    Abstract: The present disclosure includes apparatuses and methods related to a data interleaving module. A number of methods can include interleaving data received from a bus among modules according to a selected one of a plurality of data densities per memory cell supported by an apparatus and transferring the interleaved data from the modules to a register.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: August 12, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Luigi Pilolli, Maria-Luisa Gallese, Mauro Castelli
  • DATA INTERLEAVING MODULE
    Publication number: 20140040571
    Abstract: The present disclosure includes apparatuses and methods related to a data interleaving module. A number of methods can include interleaving data received from a bus among modules according to a selected one of a plurality of data densities per memory cell supported by an apparatus and transferring the interleaved data from the modules to a register.
    Type: Application
    Filed: July 31, 2012
    Publication date: February 6, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Luigi Pilolli, Maria-Luisa Gallese, Mauro Castelli