Abstract: A microfluidic device, having a containment body accommodating a plurality of ejecting elements arranged adjacent to each other. Each ejecting element has a liquid inlet, a containment chamber, a piezoelectric actuator and an ejection nozzle. The piezoelectric actuators of each ejecting element are connected to a control unit configured to generate actuation signals and to be integrated in the containment body.

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

Abstract: A microfluidic device, having a containment body accommodating a plurality of ejecting elements arranged adjacent to each other. Each ejecting element has a liquid inlet, a containment chamber, a piezoelectric actuator and an ejection nozzle. The piezoelectric actuators of each ejecting element are connected to a control unit configured to generate actuation signals and to be integrated in the containment body.

Abstract: A microfluidic device, having a containment body accommodating a plurality of ejecting elements arranged adjacent to each other. Each ejecting element has a liquid inlet, a containment chamber, a piezoelectric actuator and an ejection nozzle. The piezoelectric actuators of each ejecting element are connected to a control unit configured to generate actuation signals and to be integrated in the containment body.

Abstract: A microfluidic device, having a containment body accommodating a plurality of ejecting elements arranged adjacent to each other. Each ejecting element has a liquid inlet, a containment chamber, a piezoelectric actuator and an ejection nozzle. The piezoelectric actuators of each ejecting element are connected to a control unit configured to generate actuation signals and to be integrated in the containment body.

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

Abstract: The present disclosure is directed to a microfluidic die that includes ejection circuitry and one time programmable memory with a minimal number of contact pads to external devices. The die includes a relatively large number of nozzles and a relatively small number of contact pads. The die includes decoding circuitry that utilizes the small number of contact pads to control the drive and ejection of the nozzles and the reading/writing of the memory with the same contact pads.

Abstract: The invention relates to a monolithically integrated telephone circuit for driving wide-band telephone lines and transmitting digital data at a very high frequency. The telephone circuit is powered from a battery DC supply providing a pair of voltage references. The telephone circuit includes an output circuit portion including a pair of differential output stages, each having a pair of inputs and being connected with its output to a respective lead of a two-wire telephone line. The telephone circuit also includes a device for deriving a reference voltage from the supply voltage, and includes a low-voltage supply network which is input a DC signal and produces a voltage reference to be added to the reference voltage for delivery to one input of each output stage. The other input of each stage receives an AC signal in order to present at the circuit output a suitable AC+DC differential voltage for driving the telephone line.

Abstract: The present invention relates to a control signal generation circuit for telephone charge indicators comprising a capacitor having a first and a second terminals connected to ground through respectively a first and a second switches with the first terminal of the capacitor being also connected through a third switch to a constant current generator which is connected to a positive power supply line with respect to ground. The second terminal of the capacitor is connected to a constant current generator which is connected to a negative power supply line with respect to ground. The first and second terminals are also connected through respectively a first and a second resistance to a circuit node coupled to an output terminal.

Abstract: A circuit for limiting power dissipation through telephone subscriber line power supply interface devices, by using a pair of final stages to which an external component effective to dissipate power is connected. By use of separate discrete reference circuits, the presence of excessive common mode current is detected; and when this occurs, current to the driver stages is controlled at a lower magnitude.

Abstract: A protection device, for a telephone (or other load) 27 in series with an external protection transistor 2, includes a sensor 6 for detecting common-mode current into the load. The output of the sensor 6 is connected to affect a current source/sink combination, and imbalance in this source/sink combination produces a voltage shift which is indirectly connected to control the protection transistor.

Abstract: A telephone circuit, which may be monolithically integrated, for supplying ringing signals to a subscriber's line and for detecting an off the hook condition during ringing includes a circuit for supplying ringing signals coupled to exchange control components for generating a constant frequency sinusoidal signal which gives rise to the ringing signals and an enabling circuit, controlled by the exchange components, for enabling the supplying of the ringing signals to the line and for activating a circuit for detecting a direct current on the line. The circuit for detecting a direct current on the line supplies a signal to a circuit for controlling the detection of an off the hook condition, and which supplies an inhibiting signal for the enabling circuit and check, only after a predetermined time, whether the circuit for detecting a direct current on the line is still supplying a signal and for generating a signal informing the exchange components that the set has been off the hook.

Abstract: A telephone circuit which may be monolithically integrated for generating control signals for displaying the telephone charges to a subscriber is coupled to an AC voltage signal generator of having a predetermined amplitude and frequency which are constant over time. The circuit includes a voltage generator for generating signals which are spaced over time and have a trapezoidal pulse waveshape. A multiplier circuit calculates the product of the signals supplied from the two voltage generators and supplies a signal which is sent to the speech circuit of the subscriber's line and is added to the speech signals. The trapezoidal pulse generator has a capacitor which is charged and discharged by a voltage to current converter of a non-linear type which is driven by exchange control components. The voltage across this capacitor forms the trapezoidal signals supplied by the generator.

Abstract: A monolithically integratable signal amplifier stage with high output dynamics includes first, second, and third bipolar NPN transistors and first and second current mirror circuits. The collector terminal of the first transistor is connected to the positive terminal of a supply voltage generator. The base terminal of the first transistor is in input terminal of the amplifier stage. The base terminals of the second and third transistors are connected to the emitter terminal of the first transistor, which is connected via first constant current generator to the negative terminal of the supply voltage generator. The second and third transistors also have their emitters connected to the negative terminal of the supply voltage generator. The input of the first current mirror circuit and the output of the second current mirror circuit are connected to the collector terminals of the third and second transistors.