Patents by Inventor Max Batres
Max Batres has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240097072Abstract: A semiconductor device is formed on a bulk substrate of n-type GaN. The semiconductor device has a material layer grown on the bulk substrate. A first surface of the bulk substrate facing away from the material layer is mechanically roughened and a negative electrical contact is formed on the roughened surface using a low work function metal.Type: ApplicationFiled: September 9, 2022Publication date: March 21, 2024Inventors: Max Batres, Thomas Wunderer
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Patent number: 11908974Abstract: A light emitting device (LED) includes an n-doped semiconductor material layer, an active region including an optically active compound semiconductor layer stack configured to emit light located on the n-doped semiconductor material layer, a p-doped semiconductor material layer located on the active region, an anode contact contacting the p-doped semiconductor material layer, a reflector overlying and electrically connected to the anode contact, and a device-side bonding pad layer located on the reflector. The p-doped semiconductor material layer includes an electrically active region that is at least partially covered by the anode contact and an inactive region that an electrical conductivity less than 30% of the electrically active region.Type: GrantFiled: January 25, 2022Date of Patent: February 20, 2024Assignee: GLO TECHNOLOGIES LLCInventors: Max Batres, Fariba Danesh, Michael J. Cich, Zhen Chen
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Publication number: 20240047622Abstract: A light emitting diode (LED) array includes bottom reflectors patterned as an array of closed shapes on a top plane of a base layer for III-N growth. A three-dimensional III-N structure is epitaxially grown around the array of closed shapes and extending above the bottom reflectors. The three-dimensional III-N structures is a contiguous crystalline structure extending across the array. A laterally grown III-N layer is formed in contact with both the reflectors and the three-dimensional III-N structures, and III-N LED layers are grown on the laterally grown layer. One or more top reflectors are grown or deposited on the III-N LED layers and located over the bottom reflectors.Type: ApplicationFiled: August 3, 2022Publication date: February 8, 2024Inventors: Thomas Wunderer, Max Batres, Chris Chua
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Publication number: 20240036364Abstract: A transfer system includes a transfer layer formed of a thermally switchable material that undergoes a phase change when heated. A side of the transfer layer is placed in contact with an outward-facing side of a chiplet during a transfer operation. An optical absorber material is located on at least one of the outward facing side of the chiplet or an inward facing side of the chiplet. An optical energy source is operable to apply optical energy to the optical absorber material through the transfer layer to selectively heat a region of the transfer layer that corresponds to a location of the chiplet. The region holds the chiplet when the optical energy is removed during the transfer operation. The region is subsequently heated during the transfer operation to release the chiplet.Type: ApplicationFiled: July 28, 2022Publication date: February 1, 2024Inventors: Christopher L. Chua, Ching-Fuh Lin, Zhihong Yang, Max Batres
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Patent number: 11837683Abstract: Exemplary processing methods of forming a semiconductor structure may include forming a nucleation layer on a semiconductor substrate. The methods may further include forming first, second, and third, gallium-and-nitrogen-containing regions on the nucleation layer. The first gallium-and-nitrogen-containing region may be porosified, without porosifying the second and third gallium-and-nitrogen containing regions. The methods may still further include forming a first active region on the porosified first gallium-and-nitrogen-containing region, and a second active region on the unporosified second gallium-and-nitrogen-containing region. The methods may yet also include forming a third active region on the unporosified third gallium-and-nitrogen-containing region.Type: GrantFiled: March 10, 2021Date of Patent: December 5, 2023Assignee: Applied Materials, Inc.Inventors: Michael Chudzik, Michel Khoury, Max Batres
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Patent number: 11710805Abstract: A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.Type: GrantFiled: September 24, 2020Date of Patent: July 25, 2023Assignee: NANOSYS, INC.Inventors: Fariba Danesh, Tsun Lau, Richard P. Schneider, Jr., Michael Jansen, Max Batres
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Publication number: 20220293821Abstract: Exemplary processing methods of forming a semiconductor structure may include forming a nucleation layer on a semiconductor substrate. The methods may further include forming first, second, and third, gallium-and-nitrogen-containing regions on the nucleation layer. The first gallium-and-nitrogen-containing region may be porosified, without porosifying the second and third gallium-and-nitrogen containing regions. The methods may still further include forming a first active region on the porosified first gallium-and-nitrogen-containing region, and a second active region on the unporosified second gallium-and-nitrogen-containing region. The methods may yet also include forming a third active region on the unporosified third gallium- and-nitrogen-containing region.Type: ApplicationFiled: March 10, 2021Publication date: September 15, 2022Applicant: Applied Materials, Inc.Inventors: Michael Chudzik, Michel Khoury, Max Batres
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Publication number: 20220285584Abstract: Exemplary processing methods of forming a semiconductor structure may include forming subpixels on a substrate. Each of the subpixels may include a gallium-and-nitrogen-containing layer formed on an exposed portion of a nucleation layer on the substrate. The subpixels may further include a porosified region formed on or in the gallium-and-nitrogen-containing region, and an active region formed on the porosified region. The active region may include an indium-gallium-and-nitrogen-containing material. The processing methods may further include forming a first reflection layer around one of the subpixels, wherein the first reflection layer includes a first metal layer. The methods may additionally include forming a second reflection layer around another of the subpixels, wherein the second reflection layer includes a second metal that is different than the first metal.Type: ApplicationFiled: March 8, 2021Publication date: September 8, 2022Applicant: Applied Materials, Inc.Inventors: Michel Khoury, Lan Yu, Michael Chudzik, Max Batres
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Publication number: 20220259766Abstract: Exemplary methods of forming a semiconductor structure may include forming a nucleation layer on a semiconductor substrate. The exemplary methods may further include forming at least one gallium nitride (GaN)-containing region on the nucleation layer, and forming an indium-gallium-nitride (InGaN)-containing layer on the GaN-containing region. A porosified region may be formed on a portion of at least one of the GaN-containing region and the InGaN-containing layer, and an active region may be formed on the porosified region. In embodiments, the porosified region may be characterized by a void fraction of greater than or about 20 vol. %. In further embodiments, the active region may include a greater mole percentage (mol. %) indium than the porosified region or the GaN-containing region. In still further embodiments, the active region may characterized by a peak light emission at a wavelength of greater than or about 620 nm.Type: ApplicationFiled: February 16, 2021Publication date: August 18, 2022Applicant: Applied Materials, Inc.Inventors: Michael Chudzik, Max Batres, Michel Khoury
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Publication number: 20220149240Abstract: A light emitting device (LED) includes an n-doped semiconductor material layer, an active region including an optically active compound semiconductor layer stack configured to emit light located on the n-doped semiconductor material layer, a p-doped semiconductor material layer located on the active region, an anode contact contacting the p-doped semiconductor material layer, a reflector overlying and electrically connected to the anode contact, and a device-side bonding pad layer located on the reflector. The p-doped semiconductor material layer includes an electrically active region that is at least partially covered by the anode contact and an inactive region that an electrical conductivity less than 30% of the electrically active region.Type: ApplicationFiled: January 25, 2022Publication date: May 12, 2022Inventors: Max Batres, Fariba Danesh, Michael J. Cich, Zhen Chen
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Patent number: 11264539Abstract: A light emitting device (LED) includes an n-doped semiconductor material layer, an active region including an optically active compound semiconductor layer stack configured to emit light located on the n-doped semiconductor material layer, a p-doped semiconductor material layer located on the active region, an anode contact contacting the p-doped semiconductor material layer, a reflector overlying and electrically connected to the anode contact, and a device-side bonding pad layer located on the reflector. The p-doped semiconductor material layer includes an electrically active region that is at least partially covered by the anode contact and an inactive region that an electrical conductivity less than 30% of the electrically active region.Type: GrantFiled: November 15, 2019Date of Patent: March 1, 2022Assignee: NANOSYS, INC.Inventors: Max Batres, Fariba Danesh, Michael J. Cich, Zhen Chen
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Patent number: 11127720Abstract: A method of repairing a light emitting device assembly includes providing a repair source substrate with an array of first light emitting diodes, providing a first carrier substrate with a temporary adhesive layer thereupon, forming a first assembly including the first carrier substrate and at least one first light emitting diode that is a subset of the array of first light emitting diodes, where the at least one first light emitting diode is attached to the first carrier substrate through a respective portion of the temporary adhesive layer and detached from the repair source substrate, providing a second carrier substrate with a temporary bonding layer thereupon, attaching the at least one first light emitting diode to the temporary bonding layer, detaching the first carrier substrate from each portion of the temporary adhesive layer, removing each portion of the temporary adhesive layer from the at least one first light emitting diode, providing a light emitting device including at least one vacancy locatiType: GrantFiled: January 21, 2019Date of Patent: September 21, 2021Assignee: NANOSYS, INC.Inventors: Max Batres, Ansel Reed
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Patent number: 11069837Abstract: A light emitting diode (LED) includes a n-doped semiconductor material layer located over a substrate, an active region including an optically active compound semiconductor layer stack configured to emit light located over the n-doped semiconductor material layer, a p-doped semiconductor material layer located over the active region and containing a nickel doped surface region, a conductive layer contacting the nickel doped surface region of the p-doped semiconductor material, and a device-side bonding pad layer electrically connected to the conductive layer.Type: GrantFiled: April 19, 2019Date of Patent: July 20, 2021Assignee: GLO ABInventors: Fariba Danesh, Max Batres, Michael J. Cich, Zhen Chen
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Publication number: 20210066550Abstract: A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.Type: ApplicationFiled: September 24, 2020Publication date: March 4, 2021Inventors: Fariba DANESH, Tsun LAU, Richard P. SCHNEIDER, JR., Michael JANSEN, Max BATRES
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Patent number: 10804436Abstract: A method of forming a light emitting device includes forming a semiconductor light emitting diode, forming a metal layer stack including a first metal layer and a second metal layer on the light emitting diode, and oxidizing the metal layer stack to form transparent conductive layer including at least one conductive metal oxide.Type: GrantFiled: October 5, 2018Date of Patent: October 13, 2020Assignee: GLO ABInventors: Fariba Danesh, Tsun Lau, Richard P. Schneider, Jr., Michael Jansen, Max Batres
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Publication number: 20200235076Abstract: A method of repairing a light emitting device assembly includes providing a repair source substrate with an array of first light emitting diodes, providing a first carrier substrate with a temporary adhesive layer thereupon, forming a first assembly including the first carrier substrate and at least one first light emitting diode that is a subset of the array of first light emitting diodes, where the at least one first light emitting diode is attached to the first carrier substrate through a respective portion of the temporary adhesive layer and detached from the repair source substrate, providing a second carrier substrate with a temporary bonding layer thereupon, attaching the at least one first light emitting diode to the temporary bonding layer, detaching the first carrier substrate from each portion of the temporary adhesive layer, removing each portion of the temporary adhesive layer from the at least one first light emitting diode, providing a light emitting device including at least one vacancy locatiType: ApplicationFiled: January 21, 2019Publication date: July 23, 2020Inventors: Max BATRES, Ansel REED
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Patent number: 10707374Abstract: A method of forming a light emitting device includes forming a growth mask layer including openings on a doped compound semiconductor layer, forming first light emitting diode (LED) subpixels by forming a plurality of active regions and second conductivity type semiconductor material layers employing selective epitaxy processes, and transferring each first LED subpixel to a backplane. An anode contact electrode may be formed on the second conductivity type semiconductor material layers for redundancy. The doped compound semiconductor layer may be patterned with tapered sidewalls to enhance etendue. An optically clear encapsulation matrix may be formed on the doped compound semiconductor material layer to enhance etendue. Lift-off processes may be employed for the active regions. Cracking of the LEDs may be suppressed employing a thick reflector layer.Type: GrantFiled: September 6, 2018Date of Patent: July 7, 2020Assignee: GLO ABInventors: Fariba Danesh, Benjamin Leung, Tsun Lau, Zulal Tezcan, Miao-Chan Tsai, Max Batres, Michael Joseph Cich
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Publication number: 20200176634Abstract: A light emitting device (LED) includes an n-doped semiconductor material layer, an active region including an optically active compound semiconductor layer stack configured to emit light located on the n-doped semiconductor material layer, a p-doped semiconductor material layer located on the active region, an anode contact contacting the p-doped semiconductor material layer, a reflector overlying and electrically connected to the anode contact, and a device-side bonding pad layer located on the reflector. The p-doped semiconductor material layer includes an electrically active region that is at least partially covered by the anode contact and an inactive region that an electrical conductivity less than 30% of the electrically active region.Type: ApplicationFiled: November 15, 2019Publication date: June 4, 2020Inventors: Max BATRES, Fariba DANESH, Michael J. CICH, Zhen CHEN
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Publication number: 20190326478Abstract: A light emitting diode (LED) includes a n-doped semiconductor material layer located over a substrate, an active region including an optically active compound semiconductor layer stack configured to emit light located over the n-doped semiconductor material layer, a p-doped semiconductor material layer located over the active region and containing a nickel doped surface region, a conductive layer contacting the nickel doped surface region of the p-doped semiconductor material, and a device-side bonding pad layer electrically connected to the conductive layer.Type: ApplicationFiled: April 19, 2019Publication date: October 24, 2019Inventors: Fariba DANESH, Max BATRES, Michael J. CICH, Zhen CHEN
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Patent number: 10249786Abstract: A method of thinning a bulk aluminum nitride substrate includes providing a bulk aluminum nitride (AlN) substrate with at least one epitaxially grown group-III-nitride layer on a first side of the substrate, applying a slurry having a high pH to a second side of the substrate opposite the first side, chemical mechanically polishing the second side of the substrate using the slurry to remove at least a portion of the substrate, resulting in a thinned layer with a thickness less than 50 microns, and bonding the epitaxial layer to a non-native substrate. A device has at least one active zone in a layer of epitaxial Group-III-nitride material, the epitaxial Group-III-nitride layer having a defect density of less than or equal to 108/cm2.Type: GrantFiled: November 29, 2016Date of Patent: April 2, 2019Assignee: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Max Batres, Zhihong Yang, Thomas Wunderer