Patents by Inventor Max Christian Seifert

Max Christian Seifert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Power semiconductor device having trench electrodes biased at three different electrical potentials, and method of manufacturing the same
    Patent number: 10910487
    Abstract: A power semiconductor device is disclosed. In one example, the device comprises a semiconductor body coupled to a first load terminal and a second load terminal and comprising a drift region configured to conduct a load current between said terminals. The drift region comprises dopants of a first conductivity type. A source region is arranged in electrical contact with the first load terminal and comprises dopants of the first conductivity type. A channel region comprises dopants of a second conductivity. At least one power unit cell that includes at least one first type trench. The at least one power unit cell further includes a first mesa zone and a second mesa zone of the semiconductor body.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: February 2, 2021
    Assignee: Infineon Technologies AG
    Inventors: Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Max Christian Seifert, Antonio Vellei
  • Power semiconductor device
    Patent number: 10868159
    Abstract: A power semiconductor device includes a semiconductor body having a front side coupled to a first load terminal structure and a backside coupled to a second load terminal structure. A front side structure arranged at the front side is at least partially included in the semiconductor body and defines a front side active region configured to conduct a load current between the load terminal structures. The front side structure includes first and second lateral edge portions and a first corner portion that forms a transition between the lateral edge portions. A drift region included in the semiconductor body is configured to carry the load current. A backside emitter region arranged in the semiconductor body in contact with the second load terminal has a net dopant concentration higher than a net dopant concentration of the drift region.
    Type: Grant
    Filed: May 16, 2019
    Date of Patent: December 15, 2020
    Assignee: Infineon Technologies AG
    Inventors: Benedikt Stoib, Hans-Joachim Schulze, Max Christian Seifert
  • Power Semiconductor Device
    Publication number: 20190355841
    Abstract: A power semiconductor device includes a semiconductor body having a front side coupled to a first load terminal structure and a backside coupled to a second load terminal structure. A front side structure arranged at the front side is at least partially included in the semiconductor body and defines a front side active region configured to conduct a load current between the load terminal structures. The front side structure includes first and second lateral edge portions and a first corner portion that forms a transition between the lateral edge portions. A drift region included in the semiconductor body is configured to carry the load current. A backside emitter region arranged in the semiconductor body in contact with the second load terminal has a net dopant concentration higher than a net dopant concentration of the drift region.
    Type: Application
    Filed: May 16, 2019
    Publication date: November 21, 2019
    Inventors: Benedikt Stoib, Hans-Joachim Schulze, Max Christian Seifert
  • POWER SEMICONDUCTOR DEVICE WITH DV/DT CONTROLLABILITY
    Publication number: 20190319122
    Abstract: A power semiconductor device is disclosed. In one example, the device comprises a semiconductor body coupled to a first load terminal and a second load terminal and comprising a drift region configured to conduct a load current between said terminals. The drift region comprises dopants of a first conductivity type. A source region is arranged in electrical contact with the first load terminal and comprises dopants of the first conductivity type. A channel region comprises dopants of a second conductivity. At least one power unit cell that includes at least one first type trench. The at least one power unit cell further includes a first mesa zone and a second mesa zone of the semiconductor body.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 17, 2019
    Applicant: Infineon Technologies AG
    Inventors: Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Max Christian Seifert, Antonio Vellei
  • Power semiconductor device with dV/dt controllability through select trench electrode biasing, and method of manufacturing the same
    Patent number: 10347754
    Abstract: A power semiconductor device is disclosed. In one example, the device comprises a semiconductor body coupled to a first load terminal and a second load terminal and comprising a drift region configured to conduct a load current between said terminals. The drift region comprises dopants of a first conductivity type. A source region is arranged in electrical contact with the first load terminal and comprises dopants of the first conductivity type. A channel region comprises dopants of a second conductivity. At least one power unit cell that includes at least one first type trench. The at least one power unit cell further includes a first mesa zone and a second mesa zone of the semiconductor body.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: July 9, 2019
    Assignee: Infineon Technologies AG
    Inventors: Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Max Christian Seifert, Antonio Vellei
  • POWER SEMICONDUCTOR DEVICE WITH DV/DT CONTROLLABILITY
    Publication number: 20180076309
    Abstract: A power semiconductor device is disclosed. In one example, the device comprises a semiconductor body coupled to a first load terminal and a second load terminal and comprising a drift region configured to conduct a load current between said terminals. The drift region comprises dopants of a first conductivity type. A source region is arranged in electrical contact with the first load terminal and comprises dopants of the first conductivity type. A channel region comprises dopants of a second conductivity. At least one power unit cell that includes at least one first type trench. The at least one power unit cell further includes a first mesa zone and a second mesa zone of the semiconductor body.
    Type: Application
    Filed: September 14, 2017
    Publication date: March 15, 2018
    Applicant: Infineon Technologies AG
    Inventors: Alexander Philippou, Christian Jaeger, Johannes Georg Laven, Max Christian Seifert, Antonio Vellei