Abstract: A device for recording satellite television broadcasts comprises a satellite receiver for processing a satellite television signal, a video recorder for recording the satellite television signal, and a storage device which controls the video recorder and which stores the data of the broadcasts to be recorded. It is proposed to apply a control signal from the storage device to the satellite receiver briefly before the program to be recorded begins, which control signal switches the satellite receiver to the desired satellite program and, after termination of the broadcast to be recorded, to apply a further control signal which sets the satellite receiver from the switched-on condition to the stand-by mode or to a subsequent program to be recorded.

Abstract: A system for processing coded information is disclosed. A receiver receives coded information from a source. The receiver is equipped with a decoder and a real time clock. The coded information is decoded only when the time signal from the real time clock is within a given time interval. The coded information contains a source time signal and a time interval signal. A means for comparing the source time signal with the real time signal determines if the real time is within the time interval, and, if it is, a means for decoding will decode the coded information.

Abstract: A first pulse generator supplies an RC circuit including a first and second resistance and a capacitance. The voltage across the capacitance constitutes the output voltage. To decrease the time constant, a second pulse generator identical to the first is switched in between reference potential and the common point of the two resistors. The first pulse generator includes a first and second transistor connected in series between a first and second reference potential and a logic circuit which alternately drives the transistors to the conductive state thereby alternately connecting the common point of the two transistors to the first and second reference potential. The second pulse generator is identical to the first except that the logic circuit driving the two transistors also includes a state wherein both transistors are blocked causing the common point of the two transistors which is also the common point of the two resistances to be disconnected from both reference potentials.