Patents by Inventor Max Mah Boon Hooi

Max Mah Boon Hooi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • METHOD OF POST-MOLD GRINDING A SEMICONDUCTOR PACKAGE
    Publication number: 20120175786
    Abstract: A method of grinding a molded semiconductor package to a desired ultra thin thickness without damage to the package is disclosed. Prior to grinding a molded package to a desired package thickness, the package may be protected from excessive mechanical stress generated during grinding by applying a protective tape to enclose interconnects formed on the package. This way, the protective tape provides support to the semiconductor package during package grinding involving the mold material as well as the die. In the post-grind package, the grinded die surface may be exposed and substantially flush with the mold material. The protective tape may then be removed to prepare the post-grind package for connection with an external device or PCB.
    Type: Application
    Filed: January 9, 2012
    Publication date: July 12, 2012
    Inventors: James Yii Lee Kiong, Chong Hin Tan, Shivaram Sahadevan, Max Mah Boon Hooi, Tang Shiau Phing
  • Method of post-mold grinding a semiconductor package
    Patent number: 8124471
    Abstract: A method of grinding a molded semiconductor package to a desired ultra thin thickness without damage to the package is disclosed. Prior to grinding a molded package to a desired package thickness, the package may be protected from excessive mechanical stress generated during grinding by applying a protective tape to enclose interconnects formed on the package. This way, the protective tape provides support to the semiconductor package during package grinding involving the mold material as well as the die. In the post-grind package, the grinded die surface may be exposed and substantially flush with the mold material. The protective tape may then be removed to prepare the post-grind package for connection with an external device or PCB.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: February 28, 2012
    Assignee: Intel Corporation
    Inventors: James-Yii Lee Kiong, Chong Hin Tan, Shivaram Sahadevan, Max Mah Boon Hooi, Tang Shiau Phing
  • METHOD OF POST-MOLD GRINDING A SEMICONDUCTOR PACKAGE
    Publication number: 20090230567
    Abstract: A method of grinding a molded semiconductor package to a desired ultra thin thickness without damage to the package is disclosed. Prior to grinding a molded package to a desired package thickness, the package may be protected from excessive mechanical stress generated during grinding by applying a protective tape to enclose interconnects formed on the package. This way, the protective tape provides support to the semiconductor package during package grinding involving the mold material as well as the die. In the post-grind package, the grinded die surface may be exposed and substantially flush with the mold material. The protective tape may then be removed to prepare the post-grind package for connection with an external device or PCB.
    Type: Application
    Filed: March 11, 2008
    Publication date: September 17, 2009
    Inventors: James Yii Lee Kiong, Chong Hin Tan, Shivaram Sahadevan, Max Mah Boon Hooi, Tang Shiau Phing