Abstract: Lookup time in packet forwarding on computer networks is reduced. A first lookup is performed in a memory tree to find a first protocol forwarding entry in the memory tree. The forwarding entry includes first protocol (e.g., EGP) information and cached associated second protocol (e.g., IGP) information. Both EGP and IGP information are retrievable with the first lookup and used in the determination of an EGP route for the data packet. If the cached IGP information has been invalidated due to address updates, a second lookup can be performed to find an original IGP entry in the memory tree, the information from which can be cached in the EGP forwarding entry if a background maintenance task has finished designating all the EGP entries as having out-of-date caches.

Abstract: A method and system for reducing the lookup time in packet forwarding on computer networks. A first lookup is performed in a memory tree to find a first protocol forwarding entry in the memory tree. The forwarding entry includes first protocol (e.g., EGP) information and cached associated second protocol (e.g., IGP) information. Both EGP and IGP information are retrievable with the first lookup and used in the determination of an EGP route for the data packet. If the cached IGP information has been invalidated due to address updates, a second lookup can be performed to find an original IGP entry in the memory tree, the information from which can be cached in the EGP forwarding entry if a background maintenance task has finished designating all the EGP entries as having out-of-date caches.

Abstract: A method and system for reducing the lookup time in packet forwarding on computer networks. A first lookup is performed in a memory tree to find a first protocol forwarding entry in the memory tree. The forwarding entry includes first protocol (e.g., EGP) information and cached associated second protocol (e.g., IGP) information. Both EGP and IGP information are retrievable with the first lookup and used in the determination of an EGP route for the data packet. If the cached IGP information has been invalidated due to address updates, a second lookup can be performed to find an original IGP entry in the memory tree, the information from which can be cached in the EGP forwarding entry if a background maintenance task has finished designating all the EGP entries as having out-of-date caches.

Abstract: The Internet data defining destinations accessible by a router are partitioned into a portion containing the address search information and a portion containing forwarding option data. The address search information is stored in fast memory in a tree search format and the set of possible next destinations are stored as forwarding option data in slower memory at addresses derived algorithmically from the tree search address information. Internet data packets are received and data therein is compared to determine the best match address in the fast memory to the set of possible best next destinations. The multiple accesses necessary to determine the best match address are confined to high speed memory. An algorithm receives option data from an Internet packet and option threshold data from the best match address of the high speed memory and determines which address of the slower memory has the desired forwarding data using one access.

Abstract: In a networking environment including one or more network processing (NP) devices and implementing a routing protocol for routing data packets from a source NP devices to destination NP devices via a switch fabric, with each network processing device supporting a number of interface ports, a system and method for enabling a routing system to recover more quickly that the routing protocol so as to significantly reduce the occurrence of lost data packets to a failed target interface/blade. The routing system is enabled to track the operational status of each network processor device and operational status of destination ports supported by each network processor device in the system, and maintains the operational status as a data structure at each network processing device.

Abstract: A method, system and computer program product for preventing at least in part overloading of a control processor. A network device may comprise at least one network processor and at least one control processor. The control processor may be configured to process slow path packets that are redirected from a network processor to the control processor. The control processor may configure control blocks to determine if the bandwidth for the control processor will be exceeded by the network processor transferring another slow path packet to the control processor. If the control block determines that transmitting the slow path packet would exceed the processing capacity of the control processor, then the control block may generate a result indicating for the network processor to discard the received packet. By discarding packets that exceed the processing capacity of the control processor, overloading of the control processor may at least in part be prevented.

Abstract: A device that automatically configures the high speed (100 Mbps) port of a switch both physically and logically is provided. For physical configuration, the device determines the transmit pair conductor and the receive pair conductor interconnecting a switch port and Data Terminal Equipment (DTE). The switch port can be termed “Primary” while the connected DTE is termed “Secondary” or vice versa. For logical configurations, the device makes the determination. The device includes a switching relay, a controller and impedance matching transformers. The controller switches the connections between the relay and the transformer so that the impedance is substantially constant even though the output from the high speed port is feeding different resistive transmission lines.

Abstract: A method and system for reducing the lookup time in packet forwarding on computer networks. A first lookup is performed in a memory tree to find a first protocol forwarding entry in the memory tree. The forwarding entry includes first protocol (e.g., EGP) information and cached associated second protocol (e.g., IGP) information. Both EGP and IGP information are retrievable with the first lookup and used in the determination of an EGP route for the data packet. If the cached IGP information has been invalidated due to address updates, a second lookup can be performed to find an original IGP entry in the memory tree, the information from which can be cached in the EGP forwarding entry if a background maintenance task has finished designating all the EGP entries as having out-of-date caches.

Abstract: The Internet data defining destinations accessible by a router are partitioned into a portion containing the address search information and a portion containing forwarding option data. The address search information is stored in fast memory in a tree search format and the set of possible next destinations are stored as forwarding option data in slower memory at addresses derived algorithmically from the tree search address information. Internet data packets are received and data therein is compared to determine the best match address in the fast memory to the set of possible best next destinations. The multiple accesses necessary to determine the best match address are confined to high speed memory. An algorithm receives option data from an Internet packet and option threshold data from the best match address of the high speed memory and determines which address of the slower memory has the desired forwarding data using one access.

Abstract: A method, system and computer program product for preventing at least in part overloading of a control processor. A network device may comprise at least one network processor and at least one control processor. The control processor may be configured to process slow path packets that are redirected from a network processor to the control processor. The control processor may configure control blocks to determine if the bandwidth for the control processor will be exceeded by the network processor transferring another slow path packet to the control processor. If the control block determines that transmitting the slow path packet would exceed the processing capacity of the control processor, then the control block may generate a result indicating for the network processor to discard the received packet. By discarding packets that exceed the processing capacity of the control processor, overloading of the control processor may at least in part be prevented.

Abstract: In a networking environment including one or more network processing (NP) devices and implementing a routing protocol for routing data packets from a source NP devices to destination NP devices via a switch fabric, with each network processing device supporting a number of interface ports, a system and method for enabling a routing system to recover more quickly that the routing protocol so as to significantly reduce the occurrence of lost data packets to a failed target interface/blade. The routing system is enabled to track the operational status of each network processor device and operational status of destination ports supported by each network processor device in the system, and maintains the operational status as a data structure at each network processing device.

Abstract: The problem with sharing or multi-tasking a single microprocessor across multiple ports is that it requires an elaborate and costly effort to adapt, modify, and rewriting of existing microcode. Extensive effort has gone into the development and testing of existing microcode that supports Token Ring. The re-use of the microcode, mostly in an “as is” condition is required to increase effectiveness and reduce costs. The present invention resolves these problems. It further describes a method that easily encapsulates existing hardware and allows the use of existing microcode to be extended to a multi-tasking environment, at a substantially reduced cost and with greater efficiency. Another embodiment of this invention describes a system and method to reuse a single existing Token Ring macro with embedded processor and microcode for multiple ports on a chip.

Abstract: An apparatus for use in token ring switches for selectively setting the A/C bits in token ring frames. The apparatus includes a database with addresses of stations on the ring connected to the port. The apparatus compares the destination addresses of frames received from the ring with the addresses in the database and sets the A/C bits only if a match does not occur. By setting the A/C bits selectively, by the port, errors that would otherwise occur, either by setting the A/C bits on all frames or not setting the bits on all frames, are obviated.